forked from OSchip/llvm-project
106 lines
3.6 KiB
LLVM
106 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
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define void @knownbits_zext_in_reg(i8*) nounwind {
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; X32-LABEL: knownbits_zext_in_reg:
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; X32: # BB#0: # %BB
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movzbl (%eax), %eax
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; X32-NEXT: imull $101, %eax, %eax
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; X32-NEXT: andl $16384, %eax # imm = 0x4000
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; X32-NEXT: shrl $14, %eax
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; X32-NEXT: movzbl %al, %eax
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; X32-NEXT: vmovd %eax, %xmm0
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; X32-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; X32-NEXT: vpextrd $1, %xmm0, %ebp
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; X32-NEXT: xorl %ecx, %ecx
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; X32-NEXT: vmovd %xmm0, %esi
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; X32-NEXT: vpextrd $2, %xmm0, %edi
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; X32-NEXT: vpextrd $3, %xmm0, %ebx
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; X32-NEXT: .p2align 4, 0x90
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; X32-NEXT: .LBB0_1: # %CF
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; X32-NEXT: # =>This Loop Header: Depth=1
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; X32-NEXT: # Child Loop BB0_2 Depth 2
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: movl %ebp, %eax
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; X32-NEXT: divl %ebp
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: movl %esi, %eax
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; X32-NEXT: divl %esi
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: movl %edi, %eax
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; X32-NEXT: divl %edi
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: movl %ebx, %eax
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; X32-NEXT: divl %ebx
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; X32-NEXT: .p2align 4, 0x90
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; X32-NEXT: .LBB0_2: # %CF237
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; X32-NEXT: # Parent Loop BB0_1 Depth=1
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; X32-NEXT: # => This Inner Loop Header: Depth=2
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; X32-NEXT: testb %cl, %cl
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; X32-NEXT: jne .LBB0_2
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; X32-NEXT: jmp .LBB0_1
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;
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; X64-LABEL: knownbits_zext_in_reg:
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; X64: # BB#0: # %BB
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; X64-NEXT: movzbl (%rdi), %eax
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; X64-NEXT: imull $101, %eax, %eax
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; X64-NEXT: andl $16384, %eax # imm = 0x4000
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; X64-NEXT: shrl $14, %eax
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: vmovd %eax, %xmm0
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; X64-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; X64-NEXT: vpextrd $1, %xmm0, %r8d
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; X64-NEXT: xorl %esi, %esi
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; X64-NEXT: vmovd %xmm0, %r9d
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; X64-NEXT: vpextrd $2, %xmm0, %edi
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; X64-NEXT: vpextrd $3, %xmm0, %ecx
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; X64-NEXT: .p2align 4, 0x90
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; X64-NEXT: .LBB0_1: # %CF
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; X64-NEXT: # =>This Loop Header: Depth=1
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; X64-NEXT: # Child Loop BB0_2 Depth 2
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: movl %r8d, %eax
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; X64-NEXT: divl %r8d
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: movl %r9d, %eax
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; X64-NEXT: divl %r9d
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: divl %edi
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: movl %ecx, %eax
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; X64-NEXT: divl %ecx
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; X64-NEXT: .p2align 4, 0x90
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; X64-NEXT: .LBB0_2: # %CF237
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; X64-NEXT: # Parent Loop BB0_1 Depth=1
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; X64-NEXT: # => This Inner Loop Header: Depth=2
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; X64-NEXT: testb %sil, %sil
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; X64-NEXT: jne .LBB0_2
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; X64-NEXT: jmp .LBB0_1
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BB:
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%L5 = load i8, i8* %0
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%Sl9 = select i1 true, i8 %L5, i8 undef
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%B21 = udiv i8 %Sl9, -93
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br label %CF
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CF: ; preds = %CF246, %BB
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%I40 = insertelement <4 x i8> zeroinitializer, i8 %B21, i32 1
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%B41 = srem <4 x i8> %I40, %I40
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br label %CF237
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CF237: ; preds = %CF237, %CF
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%Cmp73 = icmp ne i1 undef, undef
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br i1 %Cmp73, label %CF237, label %CF246
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CF246: ; preds = %CF237
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%Cmp117 = icmp ult <4 x i8> %B41, undef
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%E156 = extractelement <4 x i1> %Cmp117, i32 2
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br label %CF
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}
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