forked from OSchip/llvm-project
9c375817ac
Summary: Instead, we take a single flags arg (a bitset). Also add a default 0 alignment, and change the order of arguments so the alignment comes before the flags. This greatly simplifies many callsites, and fixes a bug in AMDGPUISelLowering, wherein the order of the args to getLoad was inverted. It also greatly simplifies the process of adding another flag to getLoad. Reviewers: chandlerc, tstellarAMD Subscribers: jholewinski, arsenm, jyknight, dsanders, nemanjai, llvm-commits Differential Revision: http://reviews.llvm.org/D22249 llvm-svn: 275592 |
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| .. | ||
| Disassembler | ||
| InstPrinter | ||
| MCTargetDesc | ||
| TargetInfo | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| README.txt | ||
| XCore.h | ||
| XCore.td | ||
| XCoreAsmPrinter.cpp | ||
| XCoreCallingConv.td | ||
| XCoreFrameLowering.cpp | ||
| XCoreFrameLowering.h | ||
| XCoreFrameToArgsOffsetElim.cpp | ||
| XCoreISelDAGToDAG.cpp | ||
| XCoreISelLowering.cpp | ||
| XCoreISelLowering.h | ||
| XCoreInstrFormats.td | ||
| XCoreInstrInfo.cpp | ||
| XCoreInstrInfo.h | ||
| XCoreInstrInfo.td | ||
| XCoreLowerThreadLocal.cpp | ||
| XCoreMCInstLower.cpp | ||
| XCoreMCInstLower.h | ||
| XCoreMachineFunctionInfo.cpp | ||
| XCoreMachineFunctionInfo.h | ||
| XCoreRegisterInfo.cpp | ||
| XCoreRegisterInfo.h | ||
| XCoreRegisterInfo.td | ||
| XCoreSelectionDAGInfo.cpp | ||
| XCoreSelectionDAGInfo.h | ||
| XCoreSubtarget.cpp | ||
| XCoreSubtarget.h | ||
| XCoreTargetMachine.cpp | ||
| XCoreTargetMachine.h | ||
| XCoreTargetObjectFile.cpp | ||
| XCoreTargetObjectFile.h | ||
| XCoreTargetStreamer.h | ||
| XCoreTargetTransformInfo.h | ||
README.txt
To-do ----- * Instruction encodings * Tailcalls * Investigate loop alignment * Add builtins