forked from OSchip/llvm-project
107 lines
3.4 KiB
LLVM
107 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-- -mattr=sse4.1 < %s | FileCheck %s -check-prefix=SSE4
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; RUN: llc -mtriple=x86_64-- -mattr=avx < %s | FileCheck %s -check-prefix=AVX1
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; RUN: llc -mtriple=x86_64-- -mattr=avx2 < %s | FileCheck %s -check-prefix=AVX2
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define <16 x i16> @split16(<16 x i16> %a, <16 x i16> %b, <16 x i8> %__mask) {
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; SSE4-LABEL: split16:
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; SSE4: # %bb.0:
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; SSE4-NEXT: pminuw %xmm2, %xmm0
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; SSE4-NEXT: pminuw %xmm3, %xmm1
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; SSE4-NEXT: retq
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;
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; AVX1-LABEL: split16:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
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; AVX1-NEXT: vpminuw %xmm2, %xmm3, %xmm2
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; AVX1-NEXT: vpminuw %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: split16:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: retq
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%1 = icmp ult <16 x i16> %a, %b
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%2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
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ret <16 x i16> %2
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}
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define <32 x i16> @split32(<32 x i16> %a, <32 x i16> %b, <32 x i8> %__mask) {
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; SSE4-LABEL: split32:
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; SSE4: # %bb.0:
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; SSE4-NEXT: pminuw %xmm4, %xmm0
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; SSE4-NEXT: pminuw %xmm5, %xmm1
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; SSE4-NEXT: pminuw %xmm6, %xmm2
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; SSE4-NEXT: pminuw %xmm7, %xmm3
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; SSE4-NEXT: retq
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;
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; AVX1-LABEL: split32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
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; AVX1-NEXT: vpminuw %xmm4, %xmm5, %xmm4
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; AVX1-NEXT: vpminuw %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0
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; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
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; AVX1-NEXT: vpminuw %xmm2, %xmm4, %xmm2
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; AVX1-NEXT: vpminuw %xmm3, %xmm1, %xmm1
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: split32:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpminuw %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vpminuw %ymm3, %ymm1, %ymm1
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; AVX2-NEXT: retq
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%1 = icmp ult <32 x i16> %a, %b
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%2 = select <32 x i1> %1, <32 x i16> %a, <32 x i16> %b
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ret <32 x i16> %2
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}
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; PR19492
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define i128 @split128(<2 x i128> %a, <2 x i128> %b) {
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; SSE4-LABEL: split128:
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; SSE4: # %bb.0:
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; SSE4-NEXT: movq %rdx, %rax
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; SSE4-NEXT: addq %r8, %rdi
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; SSE4-NEXT: adcq %r9, %rsi
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; SSE4-NEXT: addq {{[0-9]+}}(%rsp), %rax
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; SSE4-NEXT: adcq {{[0-9]+}}(%rsp), %rcx
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; SSE4-NEXT: addq %rdi, %rax
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; SSE4-NEXT: adcq %rsi, %rcx
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; SSE4-NEXT: movq %rcx, %rdx
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; SSE4-NEXT: retq
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;
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; AVX1-LABEL: split128:
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; AVX1: # %bb.0:
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; AVX1-NEXT: movq %rdx, %rax
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; AVX1-NEXT: addq %r8, %rdi
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; AVX1-NEXT: adcq %r9, %rsi
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; AVX1-NEXT: addq {{[0-9]+}}(%rsp), %rax
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; AVX1-NEXT: adcq {{[0-9]+}}(%rsp), %rcx
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; AVX1-NEXT: addq %rdi, %rax
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; AVX1-NEXT: adcq %rsi, %rcx
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; AVX1-NEXT: movq %rcx, %rdx
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: split128:
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; AVX2: # %bb.0:
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; AVX2-NEXT: movq %rdx, %rax
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; AVX2-NEXT: addq %r8, %rdi
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; AVX2-NEXT: adcq %r9, %rsi
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; AVX2-NEXT: addq {{[0-9]+}}(%rsp), %rax
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; AVX2-NEXT: adcq {{[0-9]+}}(%rsp), %rcx
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; AVX2-NEXT: addq %rdi, %rax
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; AVX2-NEXT: adcq %rsi, %rcx
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; AVX2-NEXT: movq %rcx, %rdx
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; AVX2-NEXT: retq
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%add = add nsw <2 x i128> %a, %b
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%rdx.shuf = shufflevector <2 x i128> %add, <2 x i128> undef, <2 x i32> <i32 undef, i32 0>
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%bin.rdx = add <2 x i128> %add, %rdx.shuf
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%e = extractelement <2 x i128> %bin.rdx, i32 1
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ret i128 %e
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}
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