forked from OSchip/llvm-project
298 lines
8.4 KiB
LLVM
298 lines
8.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-apple-macosx -mcpu=core2 < %s | FileCheck %s
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declare i64 @testi()
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define i64 @test_trivial() {
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; CHECK-LABEL: test_trivial:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testi ## TAILCALL
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entry:
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%A = tail call i64 @testi()
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ret i64 %A
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}
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define i64 @test_noop_bitcast() {
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; CHECK-LABEL: test_noop_bitcast:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testi ## TAILCALL
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entry:
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%A = tail call i64 @testi()
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%B = bitcast i64 %A to i64
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ret i64 %B
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}
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; Tail call shouldn't be blocked by no-op inttoptr.
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define i8* @test_inttoptr() {
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; CHECK-LABEL: test_inttoptr:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testi ## TAILCALL
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entry:
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%A = tail call i64 @testi()
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%B = inttoptr i64 %A to i8*
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ret i8* %B
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}
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declare <4 x float> @testv()
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define <4 x i32> @test_vectorbitcast() {
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; CHECK-LABEL: test_vectorbitcast:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testv ## TAILCALL
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entry:
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%A = tail call <4 x float> @testv()
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%B = bitcast <4 x float> %A to <4 x i32>
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ret <4 x i32> %B
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}
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declare { i64, i64 } @testp()
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define {i64, i64} @test_pair_trivial() {
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; CHECK-LABEL: test_pair_trivial:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testp ## TAILCALL
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entry:
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%A = tail call { i64, i64} @testp()
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ret { i64, i64} %A
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}
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define {i64, i64} @test_pair_notail() {
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; CHECK-LABEL: test_pair_notail:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq _testi
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; CHECK-NEXT: movq %rax, %rdx
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: retq
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entry:
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%A = tail call i64 @testi()
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%b = insertvalue {i64, i64} undef, i64 %A, 0
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%c = insertvalue {i64, i64} %b, i64 %A, 1
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ret { i64, i64} %c
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}
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define {i64, i64} @test_pair_extract_trivial() {
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; CHECK-LABEL: test_pair_extract_trivial:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testp ## TAILCALL
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entry:
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%A = tail call { i64, i64} @testp()
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%x = extractvalue { i64, i64} %A, 0
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%y = extractvalue { i64, i64} %A, 1
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%b = insertvalue {i64, i64} undef, i64 %x, 0
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%c = insertvalue {i64, i64} %b, i64 %y, 1
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ret { i64, i64} %c
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}
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define {i64, i64} @test_pair_extract_notail() {
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; CHECK-LABEL: test_pair_extract_notail:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq _testp
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; CHECK-NEXT: movq %rax, %rcx
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; CHECK-NEXT: movq %rdx, %rax
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; CHECK-NEXT: movq %rcx, %rdx
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: retq
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entry:
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%A = tail call { i64, i64} @testp()
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%x = extractvalue { i64, i64} %A, 0
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%y = extractvalue { i64, i64} %A, 1
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%b = insertvalue {i64, i64} undef, i64 %y, 0
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%c = insertvalue {i64, i64} %b, i64 %x, 1
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ret { i64, i64} %c
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}
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define {i8*, i64} @test_pair_extract_conv() {
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; CHECK-LABEL: test_pair_extract_conv:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testp ## TAILCALL
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entry:
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%A = tail call { i64, i64} @testp()
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%x = extractvalue { i64, i64} %A, 0
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%y = extractvalue { i64, i64} %A, 1
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%x1 = inttoptr i64 %x to i8*
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%b = insertvalue {i8*, i64} undef, i8* %x1, 0
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%c = insertvalue {i8*, i64} %b, i64 %y, 1
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ret { i8*, i64} %c
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}
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define {i64, i64} @test_pair_extract_multiple() {
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; CHECK-LABEL: test_pair_extract_multiple:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testp ## TAILCALL
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entry:
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%A = tail call { i64, i64} @testp()
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%x = extractvalue { i64, i64} %A, 0
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%y = extractvalue { i64, i64} %A, 1
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%b = insertvalue {i64, i64} undef, i64 %x, 0
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%c = insertvalue {i64, i64} %b, i64 %y, 1
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%x1 = extractvalue { i64, i64} %b, 0
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%y1 = extractvalue { i64, i64} %c, 1
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%d = insertvalue {i64, i64} undef, i64 %x1, 0
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%e = insertvalue {i64, i64} %b, i64 %y1, 1
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ret { i64, i64} %e
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}
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define {i64, i64} @test_pair_extract_undef() {
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; CHECK-LABEL: test_pair_extract_undef:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testp ## TAILCALL
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entry:
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%A = tail call { i64, i64} @testp()
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%x = extractvalue { i64, i64} %A, 0
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%b = insertvalue {i64, i64} undef, i64 %x, 0
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ret { i64, i64} %b
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}
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declare { i64, { i32, i32 } } @testn()
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define {i64, {i32, i32}} @test_nest() {
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; CHECK-LABEL: test_nest:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testn ## TAILCALL
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entry:
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%A = tail call { i64, { i32, i32 } } @testn()
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%x = extractvalue { i64, { i32, i32}} %A, 0
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%y = extractvalue { i64, { i32, i32}} %A, 1
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%y1 = extractvalue { i32, i32} %y, 0
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%y2 = extractvalue { i32, i32} %y, 1
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%b = insertvalue {i64, {i32, i32}} undef, i64 %x, 0
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%c1 = insertvalue {i32, i32} undef, i32 %y1, 0
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%c2 = insertvalue {i32, i32} %c1, i32 %y2, 1
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%c = insertvalue {i64, {i32, i32}} %b, {i32, i32} %c2, 1
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ret { i64, { i32, i32}} %c
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}
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%struct.A = type { i32 }
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%struct.B = type { %struct.A, i32 }
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declare %struct.B* @testu()
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define %struct.A* @test_upcast() {
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; CHECK-LABEL: test_upcast:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testu ## TAILCALL
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entry:
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%A = tail call %struct.B* @testu()
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%x = getelementptr inbounds %struct.B, %struct.B* %A, i32 0, i32 0
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ret %struct.A* %x
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}
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; PR13006
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define { i64, i64 } @crash(i8* %this) {
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; CHECK-LABEL: crash:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _testp ## TAILCALL
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entry:
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%c = tail call { i64, i64 } @testp()
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%mrv7 = insertvalue { i64, i64 } %c, i64 undef, 1
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ret { i64, i64 } %mrv7
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}
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%struct.funcs = type { i32 (i8*, i32*, i32)*, i32 (i8*)*, i32 (i8*)*, i32 (i8*, i32)*, i32 }
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@func_table = external global [0 x %struct.funcs]
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; Check that we can fold an indexed load into a tail call instruction.
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define void @fold_indexed_load(i8* %mbstr, i64 %idxprom) nounwind uwtable ssp {
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; CHECK-LABEL: fold_indexed_load:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: leaq (%rsi,%rsi,4), %rax
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; CHECK-NEXT: movq _func_table@{{.*}}(%rip), %rcx
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; CHECK-NEXT: jmpq *16(%rcx,%rax,8) ## TAILCALL
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entry:
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%dsplen = getelementptr inbounds [0 x %struct.funcs], [0 x %struct.funcs]* @func_table, i64 0, i64 %idxprom, i32 2
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%x1 = load i32 (i8*)*, i32 (i8*)** %dsplen, align 8
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%call = tail call i32 %x1(i8* %mbstr) nounwind
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ret void
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}
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@funcs = external constant [0 x i32 (i8*, ...)*]
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; <rdar://problem/12282281> Fold an indexed load into the tail call instruction.
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; Calling a varargs function with 6 arguments requires 7 registers (%al is the
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; vector count for varargs functions). This leaves %r11 as the only available
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; scratch register.
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;
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; It is not possible to fold an indexed load into TCRETURNmi64 in that case.
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;
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; typedef int (*funcptr)(void*, ...);
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; extern const funcptr funcs[];
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; int f(int n) {
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; return funcs[n](0, 0, 0, 0, 0, 0);
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; }
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define i32 @rdar12282281(i32 %n) nounwind uwtable ssp {
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; CHECK-LABEL: rdar12282281:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movslq %edi, %rax
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; CHECK-NEXT: movq _funcs@{{.*}}(%rip), %rcx
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; CHECK-NEXT: movq (%rcx,%rax,8), %r11
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: xorl %esi, %esi
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: xorl %r8d, %r8d
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; CHECK-NEXT: xorl %r9d, %r9d
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: jmpq *%r11 ## TAILCALL
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entry:
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%idxprom = sext i32 %n to i64
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%arrayidx = getelementptr inbounds [0 x i32 (i8*, ...)*], [0 x i32 (i8*, ...)*]* @funcs, i64 0, i64 %idxprom
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%0 = load i32 (i8*, ...)*, i32 (i8*, ...)** %arrayidx, align 8
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%call = tail call i32 (i8*, ...) %0(i8* null, i32 0, i32 0, i32 0, i32 0, i32 0) nounwind
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ret i32 %call
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}
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declare x86_fp80 @fp80_callee(x86_fp80)
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define x86_fp80 @fp80_call(x86_fp80 %x) nounwind {
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; CHECK-LABEL: fp80_call:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: jmp _fp80_callee ## TAILCALL
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entry:
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%call = tail call x86_fp80 @fp80_callee(x86_fp80 %x) nounwind
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ret x86_fp80 %call
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}
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declare double @trunc(double) nounwind readnone
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; rdar://12229511 - Don't tail call trunc here.
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define x86_fp80 @trunc_fp80(x86_fp80 %x) nounwind {
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; CHECK-LABEL: trunc_fp80:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: subq $24, %rsp
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fstpl {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: callq _trunc
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; CHECK-NEXT: movsd %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fldl {{[0-9]+}}(%rsp)
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; CHECK-NEXT: addq $24, %rsp
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; CHECK-NEXT: retq
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entry:
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%conv = fptrunc x86_fp80 %x to double
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%call = tail call double @trunc(double %conv) nounwind readnone
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%conv1 = fpext double %call to x86_fp80
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ret x86_fp80 %conv1
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}
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