forked from OSchip/llvm-project
86 lines
2.3 KiB
LLVM
86 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -verify-coalescing | FileCheck %s
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define i32* @test1(i32* %P, i32 %X) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: andl $-4, %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: retl
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%Y = lshr i32 %X, 2
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%gep.upgrd.1 = zext i32 %Y to i64
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%P2 = getelementptr i32, i32* %P, i64 %gep.upgrd.1
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ret i32* %P2
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}
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define i32* @test2(i32* %P, i32 %X) {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: shll $4, %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: retl
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%Y = shl i32 %X, 2
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%gep.upgrd.2 = zext i32 %Y to i64
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%P2 = getelementptr i32, i32* %P, i64 %gep.upgrd.2
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ret i32* %P2
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}
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define i32* @test3(i32* %P, i32 %X) {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: andl $-4, %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: retl
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%Y = ashr i32 %X, 2
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%P2 = getelementptr i32, i32* %P, i32 %Y
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ret i32* %P2
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}
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define fastcc i32 @test4(i32* %d) {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzbl 3(%ecx), %eax
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; CHECK-NEXT: retl
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%tmp4 = load i32, i32* %d
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%tmp512 = lshr i32 %tmp4, 24
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ret i32 %tmp512
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}
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; Ensure that we don't fold away shifts which have multiple uses, as they are
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; just re-introduced for the second use.
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define i64 @test5(i16 %i, i32* %arr) {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: shrl $11, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: addl (%ecx,%eax,4), %eax
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; CHECK-NEXT: setb %dl
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; CHECK-NEXT: retl
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%i.zext = zext i16 %i to i32
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%index = lshr i32 %i.zext, 11
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%index.zext = zext i32 %index to i64
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%val.ptr = getelementptr inbounds i32, i32* %arr, i64 %index.zext
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%val = load i32, i32* %val.ptr
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%val.zext = zext i32 %val to i64
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%sum = add i64 %val.zext, %index.zext
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ret i64 %sum
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}
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; We should not crash because an undef shift was created.
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define i32 @overshift(i32 %a) {
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; CHECK-LABEL: overshift:
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; CHECK: # %bb.0:
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; CHECK-NEXT: retl
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%shr = lshr i32 %a, 33
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%xor = xor i32 1, %shr
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ret i32 %xor
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}
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