forked from OSchip/llvm-project
55 lines
2.2 KiB
LLVM
55 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512F
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; RUN: llc < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,AVX512VL
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @test(<4 x i64> %a, <4 x x86_fp80> %b, <8 x x86_fp80>* %c) local_unnamed_addr {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovq %xmm0, %rax
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; CHECK-NEXT: vpextrq $1, %xmm0, %rcx
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; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm0
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; CHECK-NEXT: vmovq %xmm0, %rdx
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; CHECK-NEXT: vpextrq $1, %xmm0, %rsi
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; CHECK-NEXT: cmpq $3, %rsi
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; CHECK-NEXT: fld1
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; CHECK-NEXT: fldz
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; CHECK-NEXT: fld %st(0)
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; CHECK-NEXT: fcmove %st(2), %st
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; CHECK-NEXT: cmpq $2, %rdx
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; CHECK-NEXT: fld %st(1)
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; CHECK-NEXT: fcmove %st(3), %st
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; CHECK-NEXT: cmpq $1, %rcx
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; CHECK-NEXT: fld %st(2)
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; CHECK-NEXT: fcmove %st(4), %st
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; CHECK-NEXT: testq %rax, %rax
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; CHECK-NEXT: fxch %st(3)
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; CHECK-NEXT: fcmove %st(4), %st
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; CHECK-NEXT: fstp %st(4)
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fstpt 70(%rdi)
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fstpt 50(%rdi)
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fstpt 30(%rdi)
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fstpt 10(%rdi)
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; CHECK-NEXT: fxch %st(1)
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; CHECK-NEXT: fadd %st, %st(0)
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; CHECK-NEXT: fstpt 60(%rdi)
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; CHECK-NEXT: fadd %st, %st(0)
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; CHECK-NEXT: fstpt 40(%rdi)
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; CHECK-NEXT: fadd %st, %st(0)
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; CHECK-NEXT: fstpt 20(%rdi)
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; CHECK-NEXT: fadd %st, %st(0)
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; CHECK-NEXT: fstpt (%rdi)
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%1 = icmp eq <4 x i64> <i64 0, i64 1, i64 2, i64 3>, %a
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%2 = select <4 x i1> %1, <4 x x86_fp80> <x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000>, <4 x x86_fp80> zeroinitializer
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%3 = fadd <4 x x86_fp80> %2, %2
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%4 = shufflevector <4 x x86_fp80> %3, <4 x x86_fp80> %b, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
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store <8 x x86_fp80> %4, <8 x x86_fp80>* %c, align 16
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unreachable
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}
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