forked from OSchip/llvm-project
180 lines
6.3 KiB
LLVM
180 lines
6.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s
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; Function Attrs: norecurse nounwind readnone
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define zeroext i8 @TEST_mm512_test_epi64_mask(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_test_epi64_mask:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestmq %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = icmp ne <8 x i64> %and.i.i, zeroinitializer
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%1 = bitcast <8 x i1> %0 to i8
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ret i8 %1
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}
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; Similar to the above, but the compare is reversed to have the zeros on the LHS
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define zeroext i8 @TEST_mm512_test_epi64_mask_2(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_test_epi64_mask_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestmq %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = icmp ne <8 x i64> zeroinitializer, %and.i.i
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%1 = bitcast <8 x i1> %0 to i8
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ret i8 %1
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i16 @TEST_mm512_test_epi32_mask(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_test_epi32_mask:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestmd %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = bitcast <8 x i64> %and.i.i to <16 x i32>
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%1 = icmp ne <16 x i32> %0, zeroinitializer
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%2 = bitcast <16 x i1> %1 to i16
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ret i16 %2
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i8 @TEST_mm512_mask_test_epi64_mask(i8 %__U, <8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_mask_test_epi64_mask:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestmq %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: andb %dil, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = icmp ne <8 x i64> %and.i.i, zeroinitializer
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%1 = bitcast i8 %__U to <8 x i1>
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%2 = and <8 x i1> %0, %1
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%3 = bitcast <8 x i1> %2 to i8
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ret i8 %3
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i16 @TEST_mm512_mask_test_epi32_mask(i16 %__U, <8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_mask_test_epi32_mask:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestmd %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: andl %edi, %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = bitcast <8 x i64> %and.i.i to <16 x i32>
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%1 = icmp ne <16 x i32> %0, zeroinitializer
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%2 = bitcast i16 %__U to <16 x i1>
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%3 = and <16 x i1> %1, %2
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%4 = bitcast <16 x i1> %3 to i16
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ret i16 %4
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i8 @TEST_mm512_testn_epi64_mask(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_testn_epi64_mask:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestnmq %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = icmp eq <8 x i64> %and.i.i, zeroinitializer
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%1 = bitcast <8 x i1> %0 to i8
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ret i8 %1
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}
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; Similar to the above, but the compare is reversed to have the zeros on the LHS
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define zeroext i8 @TEST_mm512_testn_epi64_mask_2(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_testn_epi64_mask_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestnmq %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = icmp eq <8 x i64> zeroinitializer, %and.i.i
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%1 = bitcast <8 x i1> %0 to i8
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ret i8 %1
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i16 @TEST_mm512_testn_epi32_mask(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_testn_epi32_mask:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestnmd %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = bitcast <8 x i64> %and.i.i to <16 x i32>
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%1 = icmp eq <16 x i32> %0, zeroinitializer
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%2 = bitcast <16 x i1> %1 to i16
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ret i16 %2
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i8 @TEST_mm512_mask_testn_epi64_mask(i8 %__U, <8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_mask_testn_epi64_mask:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestnmq %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: andb %dil, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = icmp eq <8 x i64> %and.i.i, zeroinitializer
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%1 = bitcast i8 %__U to <8 x i1>
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%2 = and <8 x i1> %0, %1
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%3 = bitcast <8 x i1> %2 to i8
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ret i8 %3
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i16 @TEST_mm512_mask_testn_epi32_mask(i16 %__U, <8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
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; CHECK-LABEL: TEST_mm512_mask_testn_epi32_mask:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vptestnmd %zmm0, %zmm1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: andl %edi, %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%and.i.i = and <8 x i64> %__B, %__A
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%0 = bitcast <8 x i64> %and.i.i to <16 x i32>
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%1 = icmp eq <16 x i32> %0, zeroinitializer
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%2 = bitcast i16 %__U to <16 x i1>
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%3 = and <16 x i1> %1, %2
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%4 = bitcast <16 x i1> %3 to i16
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ret i16 %4
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}
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