forked from OSchip/llvm-project
35 lines
1.3 KiB
LLVM
35 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah | FileCheck %s
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define void @test(<1 x i64> %c64, <1 x i64> %mask1, i8* %P) {
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; CHECK-LABEL: test:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: subl $16, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 24
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; CHECK-NEXT: .cfi_offset %edi, -8
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %eax, (%esp)
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edi
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; CHECK-NEXT: movq (%esp), %mm0
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; CHECK-NEXT: movq {{[0-9]+}}(%esp), %mm1
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; CHECK-NEXT: maskmovq %mm0, %mm1
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; CHECK-NEXT: addl $16, %esp
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: retl
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entry:
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%tmp4 = bitcast <1 x i64> %mask1 to x86_mmx ; <x86_mmx> [#uses=1]
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%tmp6 = bitcast <1 x i64> %c64 to x86_mmx ; <x86_mmx> [#uses=1]
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tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp4, x86_mmx %tmp6, i8* %P )
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ret void
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}
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declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*)
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