llvm-project/llvm/test/CodeGen
Simon Pilgrim acbc5ede99 [X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level
Followup to the PR45604 fix at rGe71dd7c011a3 where we disabled most of these cases.

By creating the shuffle at the byte level we can handle any extension/truncation as long as we track how small the scalar got and assume that the upper bytes will need to be zero.
2020-04-26 15:31:01 +01:00
..
AArch64 [AArch64][GlobalISel] Fix sub-64b stack parameter passing on Darwin. 2020-04-24 13:56:43 -07:00
AMDGPU AMDGPU: Break read2/write2 search range on a memory fence 2020-04-24 15:53:30 -04:00
ARC
ARM [XRay] Change ARM/AArch64/powerpc64le to use version 2 sled (PC-relative address) 2020-04-24 08:35:43 -07:00
AVR [AVR] Do not place functions in .progmem.data 2020-04-20 13:56:38 +02:00
BPF BPF: fix a CORE optimization bug 2020-04-20 19:54:51 -07:00
Generic [MachineDebugify] Insert synthetic DBG_VALUE instructions 2020-04-22 17:03:39 -07:00
Hexagon [Hexagon] Fix result word order when bitcasting vector pred to int64/128 2020-04-23 19:15:11 -05:00
Inputs
Lanai
MIR [AMDGPU] Avoid hard-coded line numbers in error message checks 2020-04-23 21:06:09 +01:00
MSP430
Mips [XRay] Change Sled.Function to PC-relative for sled version 2 and make llvm-xray support sled version 2 addresses 2020-04-24 14:41:56 -07:00
NVPTX [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
PowerPC [NFC][PowerPC] Add the killed flag for the case expand-isel-liveness.mir 2020-04-26 04:40:20 +00:00
RISCV [RISCV][AsmParser] Implement .option (no)pic 2020-04-17 12:08:30 +00:00
SPARC
SystemZ [SystemZ] Bugfix in adjustSubwordCmp() 2020-04-15 12:58:39 +02:00
Thumb [ARM] Don't shrink STM if it would cause an unknown base register store 2020-04-22 14:50:42 +01:00
Thumb2 [ARM] Various tests for MVE and FP16 codegen. NFC 2020-04-24 12:11:46 +01:00
VE [VE] Update integer arithmetic instructions 2020-04-15 09:47:51 +02:00
WebAssembly [WebAssembly] Add int32 DW_OP_WASM_location variant 2020-04-16 16:32:17 -07:00
WinCFGuard
WinEH
X86 [X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level 2020-04-26 15:31:01 +01:00
XCore