forked from OSchip/llvm-project
110 lines
3.4 KiB
C
110 lines
3.4 KiB
C
// REQUIRES: systemz-registered-target
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// RUN: %clang_cc1 -target-cpu z15 -triple s390x-linux-gnu \
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// RUN: -O2 -fzvector -flax-vector-conversions=none \
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// RUN: -ffp-exception-behavior=strict \
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// RUN: -Wall -Wno-unused -Werror -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -target-cpu z15 -triple s390x-linux-gnu \
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// RUN: -O2 -fzvector -flax-vector-conversions=none \
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// RUN: -ffp-exception-behavior=strict \
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// RUN: -Wall -Wno-unused -Werror -S %s -o - | FileCheck %s --check-prefix=CHECK-ASM
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#include <vecintrin.h>
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volatile vector signed int vsi;
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volatile vector signed long long vsl;
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volatile vector unsigned int vui;
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volatile vector unsigned long long vul;
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volatile vector float vf;
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volatile vector double vd;
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volatile float f;
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volatile double d;
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const float * volatile cptrf;
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const double * volatile cptrd;
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float * volatile ptrf;
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double * volatile ptrd;
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volatile int idx;
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void test_core(void) {
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// CHECK-ASM-LABEL: test_core
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vector float vf2;
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vector double vd2;
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vf += vec_revb(vec_xl(idx, cptrf));
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// CHECK-ASM: vlbrf
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vd += vec_revb(vec_xl(idx, cptrd));
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// CHECK-ASM: vlbrg
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vec_xst(vec_revb(vf), idx, ptrf);
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// CHECK-ASM: vstbrf
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vec_xst(vec_revb(vd), idx, ptrd);
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// CHECK-ASM: vstbrg
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vf += vec_revb(vec_insert_and_zero(cptrf));
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// CHECK-ASM: vllebrzf
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vd += vec_revb(vec_insert_and_zero(cptrd));
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// CHECK-ASM: vllebrzg
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vf += vec_revb(vec_splats(f));
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// CHECK-ASM: vlbrrepf
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vd += vec_revb(vec_splats(d));
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// CHECK-ASM: vlbrrepg
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vf2 = vf;
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vf += vec_revb(vec_insert(f, vec_revb(vf2), 0));
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// CHECK-ASM: vlebrf
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vd2 = vd;
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vd += vec_revb(vec_insert(d, vec_revb(vd2), 0));
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// CHECK-ASM: vlebrg
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f = vec_extract(vec_revb(vf), 0);
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// CHECK-ASM: vstebrf
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d = vec_extract(vec_revb(vd), 0);
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// CHECK-ASM: vstebrg
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vf += vec_reve(vec_xl(idx, cptrf));
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// CHECK-ASM: vlerf
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vd += vec_reve(vec_xl(idx, cptrd));
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// CHECK-ASM: vlerg
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vec_xst(vec_reve(vf), idx, ptrf);
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// CHECK-ASM: vsterf
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vec_xst(vec_reve(vd), idx, ptrd);
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// CHECK-ASM: vsterg
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}
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void test_float(void) {
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// CHECK-ASM-LABEL: test_float
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vd = vec_double(vsl);
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// CHECK: call <2 x double> @llvm.experimental.constrained.sitofp.v2f64.v2i64(<2 x i64> %{{.*}}, metadata !{{.*}})
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// CHECK-ASM: vcdgb
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vd = vec_double(vul);
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// CHECK: call <2 x double> @llvm.experimental.constrained.uitofp.v2f64.v2i64(<2 x i64> %{{.*}}, metadata !{{.*}})
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// CHECK-ASM: vcdlgb
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vf = vec_float(vsi);
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// CHECK: call <4 x float> @llvm.experimental.constrained.sitofp.v4f32.v4i32(<4 x i32> %{{.*}}, metadata !{{.*}})
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// CHECK-ASM: vcefb
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vf = vec_float(vui);
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// CHECK: call <4 x float> @llvm.experimental.constrained.uitofp.v4f32.v4i32(<4 x i32> %{{.*}}, metadata !{{.*}})
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// CHECK-ASM: vcelfb
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vsl = vec_signed(vd);
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// CHECK: call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(<2 x double> %{{.*}}, metadata !{{.*}})
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// CHECK-ASM: vcgdb
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vsi = vec_signed(vf);
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// CHECK: call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(<4 x float> %{{.*}}, metadata !{{.*}})
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// CHECK-ASM: vcfeb
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vul = vec_unsigned(vd);
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// CHECK: call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(<2 x double> %{{.*}}, metadata !{{.*}})
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// CHECK-ASM: vclgdb
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vui = vec_unsigned(vf);
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// xHECK: fptoui <4 x float> %{{.*}} to <4 x i32>
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// CHECK: call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(<4 x float> %{{.*}}, metadata !{{.*}})
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// CHECK-ASM: vclfeb
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}
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