forked from OSchip/llvm-project
108 lines
4.4 KiB
C
108 lines
4.4 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O3 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
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// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi -target-feature +mve.fp -mfloat-abi hard -fallow-half-arguments-and-returns -O3 -disable-O0-optnone -DPOLYMORPHIC -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
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#include <arm_mve.h>
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// CHECK-LABEL: @test_vminaq_s8(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = icmp slt <16 x i8> [[B:%.*]], zeroinitializer
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// CHECK-NEXT: [[TMP1:%.*]] = sub <16 x i8> zeroinitializer, [[B]]
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// CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP0]], <16 x i8> [[TMP1]], <16 x i8> [[B]]
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// CHECK-NEXT: [[TMP3:%.*]] = icmp ult <16 x i8> [[TMP2]], [[A:%.*]]
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// CHECK-NEXT: [[TMP4:%.*]] = select <16 x i1> [[TMP3]], <16 x i8> [[TMP2]], <16 x i8> [[A]]
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// CHECK-NEXT: ret <16 x i8> [[TMP4]]
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//
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uint8x16_t test_vminaq_s8(uint8x16_t a, int8x16_t b)
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{
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#ifdef POLYMORPHIC
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return vminaq(a, b);
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#else /* POLYMORPHIC */
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return vminaq_s8(a, b);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_vminaq_s16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = icmp slt <8 x i16> [[B:%.*]], zeroinitializer
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// CHECK-NEXT: [[TMP1:%.*]] = sub <8 x i16> zeroinitializer, [[B]]
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// CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP0]], <8 x i16> [[TMP1]], <8 x i16> [[B]]
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// CHECK-NEXT: [[TMP3:%.*]] = icmp ult <8 x i16> [[TMP2]], [[A:%.*]]
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// CHECK-NEXT: [[TMP4:%.*]] = select <8 x i1> [[TMP3]], <8 x i16> [[TMP2]], <8 x i16> [[A]]
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// CHECK-NEXT: ret <8 x i16> [[TMP4]]
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//
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uint16x8_t test_vminaq_s16(uint16x8_t a, int16x8_t b)
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{
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#ifdef POLYMORPHIC
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return vminaq(a, b);
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#else /* POLYMORPHIC */
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return vminaq_s16(a, b);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_vminaq_s32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = icmp slt <4 x i32> [[B:%.*]], zeroinitializer
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// CHECK-NEXT: [[TMP1:%.*]] = sub <4 x i32> zeroinitializer, [[B]]
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// CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[TMP1]], <4 x i32> [[B]]
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// CHECK-NEXT: [[TMP3:%.*]] = icmp ult <4 x i32> [[TMP2]], [[A:%.*]]
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// CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> [[TMP3]], <4 x i32> [[TMP2]], <4 x i32> [[A]]
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// CHECK-NEXT: ret <4 x i32> [[TMP4]]
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//
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uint32x4_t test_vminaq_s32(uint32x4_t a, int32x4_t b)
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{
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#ifdef POLYMORPHIC
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return vminaq(a, b);
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#else /* POLYMORPHIC */
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return vminaq_s32(a, b);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_vminaq_m_s8(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = tail call <16 x i8> @llvm.arm.mve.vmina.predicated.v16i8.v16i1(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i1> [[TMP1]])
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// CHECK-NEXT: ret <16 x i8> [[TMP2]]
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//
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uint8x16_t test_vminaq_m_s8(uint8x16_t a, int8x16_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return vminaq_m(a, b, p);
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#else /* POLYMORPHIC */
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return vminaq_m_s8(a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_vminaq_m_s16(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i16> @llvm.arm.mve.vmina.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]])
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// CHECK-NEXT: ret <8 x i16> [[TMP2]]
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//
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uint16x8_t test_vminaq_m_s16(uint16x8_t a, int16x8_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return vminaq_m(a, b, p);
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#else /* POLYMORPHIC */
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return vminaq_m_s16(a, b, p);
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#endif /* POLYMORPHIC */
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}
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// CHECK-LABEL: @test_vminaq_m_s32(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
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// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x i32> @llvm.arm.mve.vmina.predicated.v4i32.v4i1(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i1> [[TMP1]])
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// CHECK-NEXT: ret <4 x i32> [[TMP2]]
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//
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uint32x4_t test_vminaq_m_s32(uint32x4_t a, int32x4_t b, mve_pred16_t p)
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{
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#ifdef POLYMORPHIC
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return vminaq_m(a, b, p);
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#else /* POLYMORPHIC */
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return vminaq_m_s32(a, b, p);
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#endif /* POLYMORPHIC */
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}
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