forked from OSchip/llvm-project
262 lines
9.8 KiB
C++
262 lines
9.8 KiB
C++
//===- Target.h -------------------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLD_ELF_TARGET_H
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#define LLD_ELF_TARGET_H
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#include "InputSection.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/Object/ELF.h"
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#include "llvm/Support/MathExtras.h"
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#include <array>
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namespace lld {
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std::string toString(elf::RelType Type);
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namespace elf {
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class Defined;
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class InputFile;
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class Symbol;
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class TargetInfo {
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public:
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virtual uint32_t calcEFlags() const { return 0; }
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virtual RelType getDynRel(RelType Type) const { return Type; }
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virtual void writeGotPltHeader(uint8_t *Buf) const {}
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virtual void writeGotHeader(uint8_t *Buf) const {}
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virtual void writeGotPlt(uint8_t *Buf, const Symbol &S) const {};
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virtual void writeIgotPlt(uint8_t *Buf, const Symbol &S) const;
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virtual int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const;
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virtual int getTlsGdRelaxSkip(RelType Type) const { return 1; }
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// If lazy binding is supported, the first entry of the PLT has code
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// to call the dynamic linker to resolve PLT entries the first time
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// they are called. This function writes that code.
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virtual void writePltHeader(uint8_t *Buf) const {}
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virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
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uint64_t PltEntryAddr, int32_t Index,
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unsigned RelOff) const {}
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virtual void addPltHeaderSymbols(InputSection &IS) const {}
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virtual void addPltSymbols(InputSection &IS, uint64_t Off) const {}
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// Returns true if a relocation only uses the low bits of a value such that
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// all those bits are in the same page. For example, if the relocation
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// only uses the low 12 bits in a system with 4k pages. If this is true, the
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// bits will always have the same value at runtime and we don't have to emit
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// a dynamic relocation.
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virtual bool usesOnlyLowPageBits(RelType Type) const;
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// Decide whether a Thunk is needed for the relocation from File
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// targeting S.
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virtual bool needsThunk(RelExpr Expr, RelType RelocType,
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const InputFile *File, uint64_t BranchAddr,
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const Symbol &S) const;
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// On systems with range extensions we place collections of Thunks at
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// regular spacings that enable the majority of branches reach the Thunks.
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// a value of 0 means range extension thunks are not supported.
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virtual uint32_t getThunkSectionSpacing() const { return 0; }
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// The function with a prologue starting at Loc was compiled with
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// -fsplit-stack and it calls a function compiled without. Adjust the prologue
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// to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks.
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// The symbols st_other flags are needed on PowerPC64 for determining the
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// offset to the split-stack prologue.
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virtual bool adjustPrologueForCrossSplitStack(uint8_t *Loc, uint8_t *End,
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uint8_t StOther) const;
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// Return true if we can reach Dst from Src with Relocation RelocType
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virtual bool inBranchRange(RelType Type, uint64_t Src,
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uint64_t Dst) const;
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virtual RelExpr getRelExpr(RelType Type, const Symbol &S,
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const uint8_t *Loc) const = 0;
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virtual void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const = 0;
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virtual ~TargetInfo();
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unsigned DefaultCommonPageSize = 4096;
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unsigned DefaultMaxPageSize = 4096;
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uint64_t getImageBase() const;
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// True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got.
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bool GotBaseSymInGotPlt = true;
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RelType CopyRel;
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RelType GotRel;
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RelType NoneRel;
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RelType PltRel;
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RelType RelativeRel;
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RelType IRelativeRel;
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RelType SymbolicRel;
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RelType TlsDescRel;
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RelType TlsGotRel;
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RelType TlsModuleIndexRel;
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RelType TlsOffsetRel;
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unsigned PltEntrySize;
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unsigned PltHeaderSize;
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// At least on x86_64 positions 1 and 2 are used by the first plt entry
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// to support lazy loading.
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unsigned GotPltHeaderEntriesNum = 3;
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// On PPC ELF V2 abi, the first entry in the .got is the .TOC.
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unsigned GotHeaderEntriesNum = 0;
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bool NeedsThunks = false;
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// A 4-byte field corresponding to one or more trap instructions, used to pad
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// executable OutputSections.
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std::array<uint8_t, 4> TrapInstr;
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// If a target needs to rewrite calls to __morestack to instead call
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// __morestack_non_split when a split-stack enabled caller calls a
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// non-split-stack callee this will return true. Otherwise returns false.
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bool NeedsMoreStackNonSplit = true;
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virtual RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
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RelExpr Expr) const;
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virtual void relaxGot(uint8_t *Loc, RelType Type, uint64_t Val) const;
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virtual void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const;
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virtual void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
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virtual void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
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virtual void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
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protected:
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// On FreeBSD x86_64 the first page cannot be mmaped.
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// On Linux that is controled by vm.mmap_min_addr. At least on some x86_64
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// installs that is 65536, so the first 15 pages cannot be used.
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// Given that, the smallest value that can be used in here is 0x10000.
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uint64_t DefaultImageBase = 0x10000;
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};
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TargetInfo *getAArch64TargetInfo();
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TargetInfo *getAMDGPUTargetInfo();
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TargetInfo *getARMTargetInfo();
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TargetInfo *getAVRTargetInfo();
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TargetInfo *getHexagonTargetInfo();
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TargetInfo *getMSP430TargetInfo();
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TargetInfo *getPPC64TargetInfo();
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TargetInfo *getPPCTargetInfo();
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TargetInfo *getRISCVTargetInfo();
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TargetInfo *getSPARCV9TargetInfo();
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TargetInfo *getX86TargetInfo();
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TargetInfo *getX86_64TargetInfo();
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template <class ELFT> TargetInfo *getMipsTargetInfo();
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struct ErrorPlace {
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InputSectionBase *IS;
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std::string Loc;
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};
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// Returns input section and corresponding source string for the given location.
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ErrorPlace getErrorPlace(const uint8_t *Loc);
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static inline std::string getErrorLocation(const uint8_t *Loc) {
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return getErrorPlace(Loc).Loc;
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}
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void writePPC32GlinkSection(uint8_t *Buf, size_t NumEntries);
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bool tryRelaxPPC64TocIndirection(RelType Type, const Relocation &Rel,
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uint8_t *BufLoc);
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unsigned getPPCDFormOp(unsigned SecondaryOp);
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// In the PowerPC64 Elf V2 abi a function can have 2 entry points. The first
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// is a global entry point (GEP) which typically is used to initialize the TOC
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// pointer in general purpose register 2. The second is a local entry
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// point (LEP) which bypasses the TOC pointer initialization code. The
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// offset between GEP and LEP is encoded in a function's st_other flags.
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// This function will return the offset (in bytes) from the global entry-point
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// to the local entry-point.
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unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t StOther);
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// Returns true if a relocation is a small code model relocation that accesses
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// the .toc section.
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bool isPPC64SmallCodeModelTocReloc(RelType Type);
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uint64_t getPPC64TocBase();
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uint64_t getAArch64Page(uint64_t Expr);
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extern const TargetInfo *Target;
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TargetInfo *getTarget();
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template <class ELFT> bool isMipsPIC(const Defined *Sym);
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static inline void reportRangeError(uint8_t *Loc, RelType Type, const Twine &V,
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int64_t Min, uint64_t Max) {
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ErrorPlace ErrPlace = getErrorPlace(Loc);
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StringRef Hint;
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if (ErrPlace.IS && ErrPlace.IS->Name.startswith(".debug"))
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Hint = "; consider recompiling with -fdebug-types-section to reduce size "
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"of debug sections";
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errorOrWarn(ErrPlace.Loc + "relocation " + lld::toString(Type) +
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" out of range: " + V.str() + " is not in [" + Twine(Min).str() +
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", " + Twine(Max).str() + "]" + Hint);
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}
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// Make sure that V can be represented as an N bit signed integer.
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inline void checkInt(uint8_t *Loc, int64_t V, int N, RelType Type) {
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if (V != llvm::SignExtend64(V, N))
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reportRangeError(Loc, Type, Twine(V), llvm::minIntN(N), llvm::maxIntN(N));
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}
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// Make sure that V can be represented as an N bit unsigned integer.
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inline void checkUInt(uint8_t *Loc, uint64_t V, int N, RelType Type) {
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if ((V >> N) != 0)
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reportRangeError(Loc, Type, Twine(V), 0, llvm::maxUIntN(N));
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}
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// Make sure that V can be represented as an N bit signed or unsigned integer.
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inline void checkIntUInt(uint8_t *Loc, uint64_t V, int N, RelType Type) {
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// For the error message we should cast V to a signed integer so that error
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// messages show a small negative value rather than an extremely large one
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if (V != (uint64_t)llvm::SignExtend64(V, N) && (V >> N) != 0)
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reportRangeError(Loc, Type, Twine((int64_t)V), llvm::minIntN(N),
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llvm::maxIntN(N));
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}
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inline void checkAlignment(uint8_t *Loc, uint64_t V, int N, RelType Type) {
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if ((V & (N - 1)) != 0)
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error(getErrorLocation(Loc) + "improper alignment for relocation " +
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lld::toString(Type) + ": 0x" + llvm::utohexstr(V) +
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" is not aligned to " + Twine(N) + " bytes");
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}
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// Endianness-aware read/write.
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inline uint16_t read16(const void *P) {
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return llvm::support::endian::read16(P, Config->Endianness);
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}
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inline uint32_t read32(const void *P) {
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return llvm::support::endian::read32(P, Config->Endianness);
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}
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inline uint64_t read64(const void *P) {
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return llvm::support::endian::read64(P, Config->Endianness);
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}
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inline void write16(void *P, uint16_t V) {
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llvm::support::endian::write16(P, V, Config->Endianness);
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}
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inline void write32(void *P, uint32_t V) {
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llvm::support::endian::write32(P, V, Config->Endianness);
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}
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inline void write64(void *P, uint64_t V) {
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llvm::support::endian::write64(P, V, Config->Endianness);
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}
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} // namespace elf
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} // namespace lld
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#endif
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