forked from OSchip/llvm-project
94 lines
3.7 KiB
LLVM
94 lines
3.7 KiB
LLVM
; RUN: opt %loadPolly -polly-detect -polly-allow-nonaffine-branches \
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; RUN: -polly-allow-nonaffine-loops=false \
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; RUN: -analyze < %s | FileCheck %s --check-prefix=REJECTNONAFFINELOOPS
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; RUN: opt %loadPolly -polly-detect -polly-allow-nonaffine-branches \
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; RUN: -polly-allow-nonaffine-loops=true \
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; RUN: -analyze < %s | FileCheck %s --check-prefix=ALLOWNONAFFINELOOPS
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; RUN: opt %loadPolly -polly-detect -polly-allow-nonaffine \
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; RUN: -polly-allow-nonaffine-branches -polly-allow-nonaffine-loops=true \
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; RUN: -analyze < %s \
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; RUN: | FileCheck %s --check-prefix=ALLOWNONAFFINELOOPSANDACCESSES
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;
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; Here we have a non-affine loop (in the context of the loop nest)
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; and also a non-affine access (A[k]). While we can always detect the
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; innermost loop as a SCoP of depth 1, we have to reject the loop nest if not
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; both, non-affine loops as well as non-affine accesses are allowed.
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;
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; REJECTNONAFFINELOOPS: Valid Region for Scop: bb15 => bb13
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; REJECTNONAFFINELOOPS-NOT: Valid
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; ALLOWNONAFFINELOOPS: Valid Region for Scop: bb15 => bb13
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; ALLOWNONAFFINELOOPS-NOT: Valid
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; ALLOWNONAFFINELOOPSANDACCESSES: Valid Region for Scop: bb11 => bb29
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;
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; void f(int *A) {
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; for (int i = 0; i < 1024; i++)
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; for (int j = 0; j < 1024; j++)
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; for (int k = i *j; k < 1024; k++)
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; A[k] += A[i] + A[j];
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; }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @f(i32* %A) {
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bb:
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br label %bb11
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bb11: ; preds = %bb28, %bb
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%indvars.iv8 = phi i64 [ %indvars.iv.next9, %bb28 ], [ 0, %bb ]
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%indvars.iv1 = phi i64 [ %indvars.iv.next2, %bb28 ], [ 0, %bb ]
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%exitcond10 = icmp ne i64 %indvars.iv8, 1024
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br i1 %exitcond10, label %bb12, label %bb29
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bb12: ; preds = %bb11
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br label %bb13
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bb13: ; preds = %bb26, %bb12
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%indvars.iv5 = phi i64 [ %indvars.iv.next6, %bb26 ], [ 0, %bb12 ]
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%indvars.iv3 = phi i64 [ %indvars.iv.next4, %bb26 ], [ 0, %bb12 ]
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%exitcond7 = icmp ne i64 %indvars.iv5, 1024
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br i1 %exitcond7, label %bb14, label %bb27
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bb14: ; preds = %bb13
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br label %bb15
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bb15: ; preds = %bb24, %bb14
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%indvars.iv = phi i64 [ %indvars.iv.next, %bb24 ], [ %indvars.iv3, %bb14 ]
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%exitcond = icmp ne i64 %indvars.iv, 1024
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br i1 %exitcond, label %bb16, label %bb25
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bb16: ; preds = %bb15
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%tmp = getelementptr inbounds i32, i32* %A, i64 %indvars.iv8
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%tmp17 = load i32, i32* %tmp, align 4
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%tmp18 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv5
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%tmp19 = load i32, i32* %tmp18, align 4
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%tmp20 = add nsw i32 %tmp17, %tmp19
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%tmp21 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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%tmp22 = load i32, i32* %tmp21, align 4
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%tmp23 = add nsw i32 %tmp22, %tmp20
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store i32 %tmp23, i32* %tmp21, align 4
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br label %bb24
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bb24: ; preds = %bb16
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %bb15
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bb25: ; preds = %bb15
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br label %bb26
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bb26: ; preds = %bb25
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%indvars.iv.next6 = add nuw nsw i64 %indvars.iv5, 1
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%indvars.iv.next4 = add nuw nsw i64 %indvars.iv3, %indvars.iv1
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br label %bb13
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bb27: ; preds = %bb13
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br label %bb28
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bb28: ; preds = %bb27
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%indvars.iv.next9 = add nuw nsw i64 %indvars.iv8, 1
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%indvars.iv.next2 = add nuw nsw i64 %indvars.iv1, 1
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br label %bb11
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bb29: ; preds = %bb11
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ret void
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}
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