forked from OSchip/llvm-project
62 lines
1.9 KiB
LLVM
62 lines
1.9 KiB
LLVM
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+lob,+mve.fp -disable-arm-loloops=true %s -o - | FileCheck %s --check-prefix=DISABLED
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; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+lob,+mve.fp %s -o - | FileCheck %s
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; DISABLED-NOT: dls lr,
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; CHECK-LABEL: test_target_specific:
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; CHECK: mov.w lr, #50
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; CHECK: dls lr, lr
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; CHECK-NOT: mov lr,
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; CHECK: [[LOOP_HEADER:\.LBB[0-9_]+]]:
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; CHECK: le lr, [[LOOP_HEADER]]
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; CHECK-NOT: b .
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; CHECK: @ %exit
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define i32 @test_target_specific(i32* %a, i32* %b) {
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entry:
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br label %loop
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loop:
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%acc = phi i32 [ 0, %entry ], [ %res, %loop ]
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%count = phi i32 [ 0, %entry ], [ %count.next, %loop ]
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%addr.a = getelementptr i32, i32* %a, i32 %count
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%addr.b = getelementptr i32, i32* %b, i32 %count
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%load.a = load i32, i32* %addr.a
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%load.b = load i32, i32* %addr.b
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%res = call i32 @llvm.arm.smlad(i32 %load.a, i32 %load.b, i32 %acc)
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%count.next = add nuw i32 %count, 2
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%cmp = icmp ne i32 %count.next, 100
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br i1 %cmp, label %loop, label %exit
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exit:
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ret i32 %res
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}
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; CHECK-LABEL: test_fabs:
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; CHECK: mov.w lr, #100
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; CHECK: dls lr, lr
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; CHECK-NOT: mov lr,
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; CHECK: [[LOOP_HEADER:\.LBB[0-9_]+]]:
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; CHECK-NOT: bl
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; CHECK: le lr, [[LOOP_HEADER]]
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; CHECK-NOT: b .
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; CHECK: @ %exit
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define float @test_fabs(float* %a) {
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entry:
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br label %loop
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loop:
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%acc = phi float [ 0.0, %entry ], [ %res, %loop ]
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%count = phi i32 [ 0, %entry ], [ %count.next, %loop ]
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%addr.a = getelementptr float, float* %a, i32 %count
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%load.a = load float, float* %addr.a
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%abs = call float @llvm.fabs.f32(float %load.a)
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%res = fadd float %abs, %acc
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%count.next = add nuw i32 %count, 1
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%cmp = icmp ne i32 %count.next, 100
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br i1 %cmp, label %loop, label %exit
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exit:
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ret float %res
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}
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declare i32 @llvm.arm.smlad(i32, i32, i32)
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declare float @llvm.fabs.f32(float)
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