forked from OSchip/llvm-project
898d953693
Embedded Trace Extension and Trace Buffer Extension are optional future architecture extensions. (cf. https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools) Their system registers are documented here: https://developer.arm.com/docs/ddi0601/a ETE shares register names with ETM. One exception is the ETE TRCEXTINSELR0 register, which has the same encoding as the ETM TRCEXTINSELR register (but different semantics). This patch treats them as aliases: the assembler will accept both names, emitting identical encoding, and the disassembler will keep disassembling to TRCEXRINSELR. Differential Revision: https://reviews.llvm.org/D63707 llvm-svn: 367093 |
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| AArch64 | ||
| AMDGPU | ||
| ARM | ||
| AVR | ||
| AsmParser | ||
| BPF | ||
| COFF | ||
| Disassembler | ||
| ELF | ||
| Hexagon | ||
| Lanai | ||
| MSP430 | ||
| MachO | ||
| Mips | ||
| PowerPC | ||
| RISCV | ||
| Sparc | ||
| SystemZ | ||
| WebAssembly | ||
| X86 | ||