forked from OSchip/llvm-project
d0d7860f40
Not all instructions define a virtual register in their first operand. Specifically, INLINEASM has a different format. <rdar://problem/12472811> llvm-svn: 165721 |
||
---|---|---|
.. | ||
ARM | ||
CPP | ||
CellSPU | ||
Generic | ||
Hexagon | ||
MBlaze | ||
MSP430 | ||
Mips | ||
NVPTX | ||
PowerPC | ||
SPARC | ||
Thumb | ||
Thumb2 | ||
X86 | ||
XCore |