Michael Kuperstein ffcc7663a2 [X86] Fix order of operands for ins and outs instructions when parsing intel syntax ... Patch by: marina.yatsina@intel.com Differential Revision: http://reviews.llvm.org/D11337 llvm-svn: 243001		2015-07-23 10:23:48 +00:00
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AArch64	AArch64: add rev64 alias for 64-bit rev instruction.	2015-07-14 17:07:29 +00:00
AMDGPU	AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support	2015-06-26 21:58:31 +00:00
ARM	[ARM] Handle commutativity when converting to tADDhirr in Thumb2	2015-07-13 15:31:48 +00:00
AsmParser	Teaching llvm-mc how to understand the defsym command line option. This allows integer-constant symbols to be defined on the command line and used during assembly.	2015-06-07 01:46:24 +00:00
COFF	[MC] Correctly escape .safeseh's symbol	2015-07-13 18:51:15 +00:00
Disassembler	[mips] Added support for the ERETNC instruction.	2015-07-20 12:28:56 +00:00
ELF	[X86] Fix incorrect/inefficient pushw encodings for x86-64 targets	2015-07-05 10:25:41 +00:00
Hexagon	[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.	2015-06-05 16:00:11 +00:00
MachO	[AsmPrinter] Check for valid constants in handleIndirectSymViaGOTPCRel	2015-07-21 21:45:42 +00:00
Markup	…
Mips	[mips] Added support for the ERETNC instruction.	2015-07-20 12:28:56 +00:00
PowerPC	[PPC] Implement vmrgew and vmrgow instructions	2015-06-25 15:17:40 +00:00
Sparc	[Sparc] Add more instruction aliases.	2015-07-06 16:01:07 +00:00
SystemZ	[SystemZ] Add z13 vector facility and MC support	2015-05-05 19:23:40 +00:00
X86	[X86] Fix order of operands for ins and outs instructions when parsing intel syntax	2015-07-23 10:23:48 +00:00