forked from OSchip/llvm-project
29 lines
820 B
LLVM
29 lines
820 B
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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; Check that we are able to predicate instructions with gp-relative
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; addressing mode.
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@d = external global i32
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@c = common global i32 0, align 4
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; Function Attrs: nounwind
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define i32 @test2(i8 zeroext %a, i8 zeroext %b) #0 {
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; CHECK: if{{ *}}({{!*}}p{{[0-3]+}}{{[.new]*}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}memw(##{{[cd]}})
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; CHECK: if{{ *}}({{!*}}p{{[0-3]+}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}memw(##{{[cd]}})
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entry:
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%cmp = icmp eq i8 %a, %b
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br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
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entry.if.end_crit_edge:
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%.pre = load i32* @c, align 4
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br label %if.end
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if.then:
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%0 = load i32* @d, align 4
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store i32 %0, i32* @c, align 4
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br label %if.end
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if.end:
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%1 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %0, %if.then ]
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ret i32 %1
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}
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