forked from OSchip/llvm-project
73 lines
2.7 KiB
LLVM
73 lines
2.7 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
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; indexing of vectors.
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; Subtest below moved from file test/CodeGen/AMDGPU/indirect-addressing-si.ll
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; to avoid gfx9 scheduling induced issues.
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; GCN-LABEL: {{^}}insert_vgpr_offset_multiple_in_block:
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; GCN-DAG: s_load_dwordx16 s{{\[}}[[S_ELT0:[0-9]+]]:[[S_ELT15:[0-9]+]]{{\]}}
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; GCN-DAG: {{buffer|flat|global}}_load_dword [[IDX0:v[0-9]+]]
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; GCN-DAG: v_mov_b32 [[INS0:v[0-9]+]], 62
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; GCN-DAG: v_mov_b32_e32 v[[VEC_ELT15:[0-9]+]], s[[S_ELT15]]
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; GCN-DAG: v_mov_b32_e32 v[[VEC_ELT0:[0-9]+]], s[[S_ELT0]]
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; GCN: v_cmp_eq_u32_e32
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; GCN-COUNT-32: v_cndmask_b32
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; GCN-COUNT-4: buffer_store_dwordx4
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define amdgpu_kernel void @insert_vgpr_offset_multiple_in_block(<16 x i32> addrspace(1)* %out0, <16 x i32> addrspace(1)* %out1, i32 addrspace(1)* %in, <16 x i32> %vec0) #0 {
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entry:
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%id = call i32 @llvm.amdgcn.workitem.id.x() #1
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%id.ext = zext i32 %id to i64
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %in, i64 %id.ext
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%idx0 = load volatile i32, i32 addrspace(1)* %gep
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%idx1 = add i32 %idx0, 1
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%live.out.val = call i32 asm sideeffect "v_mov_b32 $0, 62", "=v"()
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%vec1 = insertelement <16 x i32> %vec0, i32 %live.out.val, i32 %idx0
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%vec2 = insertelement <16 x i32> %vec1, i32 63, i32 %idx1
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store volatile <16 x i32> %vec2, <16 x i32> addrspace(1)* %out0
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%cmp = icmp eq i32 %id, 0
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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store volatile i32 %live.out.val, i32 addrspace(1)* undef
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br label %bb2
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bb2:
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ret void
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}
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; Avoid inserting extra v_mov from copies within the vgpr indexing sequence. The
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; gpr_idx mode switching sequence is expanded late for this reason.
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; GCN-LABEL: {{^}}insert_w_offset_multiple_in_block
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; GCN: s_set_gpr_idx_on
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; GCN-NEXT: v_mov_b32_e32
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; GCN-NEXT: s_set_gpr_idx_off
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; GCN: s_set_gpr_idx_on
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; GCN-NEXT: v_mov_b32_e32
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; GCN-NOT: v_mov_b32_e32
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; GCN-NEXT: s_set_gpr_idx_off
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define amdgpu_kernel void @insert_w_offset_multiple_in_block(<16 x float> addrspace(1)* %out1, i32 %in) #0 {
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entry:
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%add1 = add i32 %in, 1
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%ins1 = insertelement <16 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, float 11.0, float 12.0, float 13.0, float 14.0, float 15.0, float 16.0>, float 17.0, i32 %add1
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%add2 = add i32 %in, 2
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%ins2 = insertelement <16 x float> %ins1, float 17.0, i32 %add2
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store <16 x float> %ins1, <16 x float> addrspace(1)* %out1
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%out2 = getelementptr <16 x float>, <16 x float> addrspace(1)* %out1, i32 1
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store <16 x float> %ins2, <16 x float> addrspace(1)* %out2
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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declare void @llvm.amdgcn.s.barrier() #2
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attributes #0 = { nounwind }
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