forked from OSchip/llvm-project
30 lines
874 B
TableGen
30 lines
874 B
TableGen
// RUN: mlir-tblgen -gen-rewriters -I %S/../../include %s | FileCheck %s
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include "mlir/IR/OpBase.td"
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def ThreeResultOp : Op<"three_result_op", []> {
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let arguments = (ins I32:$input);
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let results = (outs I32:$r1, I32:$r2, I32:$r3);
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}
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def OneResultOp : Op<"one_result_op", []> {
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let arguments = (ins I32:$input);
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let results = (outs I32:$r1);
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}
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def : Pattern<(ThreeResultOp $input), [
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(verifyUnusedValue),
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(OneResultOp $input),
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(verifyUnusedValue)
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]>;
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// CHECK-LABEL: struct GeneratedConvert0
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// CHECK: PatternMatchResult match(
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// CHECK: if (!op0->getResult(0)->use_empty()) return matchFailure();
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// CHECK: if (!op0->getResult(2)->use_empty()) return matchFailure();
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// CHECK: void rewrite(
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// CHECK: auto vOneResultOp0 = rewriter.create<OneResultOp>(
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// CHECK: rewriter.replaceOp(op, {nullptr, vOneResultOp0, nullptr});
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