forked from OSchip/llvm-project
105 lines
3.7 KiB
C++
105 lines
3.7 KiB
C++
//===--- RISCV.cpp - Implement RISCV target feature support ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements RISCV TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#include "RISCV.h"
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#include "clang/Basic/MacroBuilder.h"
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#include "llvm/ADT/StringSwitch.h"
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using namespace clang;
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using namespace clang::targets;
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ArrayRef<const char *> RISCVTargetInfo::getGCCRegNames() const {
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static const char *const GCCRegNames[] = {
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"x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
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"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
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"x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
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"x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31"};
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return llvm::makeArrayRef(GCCRegNames);
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}
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ArrayRef<TargetInfo::GCCRegAlias> RISCVTargetInfo::getGCCRegAliases() const {
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static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
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{{"zero"}, "x0"}, {{"ra"}, "x1"}, {{"sp"}, "x2"}, {{"gp"}, "x3"},
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{{"tp"}, "x4"}, {{"t0"}, "x5"}, {{"t1"}, "x6"}, {{"t2"}, "x7"},
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{{"s0"}, "x8"}, {{"s1"}, "x9"}, {{"a0"}, "x10"}, {{"a1"}, "x11"},
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{{"a2"}, "x12"}, {{"a3"}, "x13"}, {{"a4"}, "x15"}, {{"a5"}, "x15"},
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{{"a6"}, "x16"}, {{"a7"}, "x17"}, {{"s2"}, "x18"}, {{"s3"}, "x19"},
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{{"s4"}, "x20"}, {{"s5"}, "x21"}, {{"s6"}, "x22"}, {{"s7"}, "x23"},
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{{"s8"}, "x24"}, {{"s9"}, "x25"}, {{"s10"}, "x26"}, {{"s11"}, "x27"},
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{{"t3"}, "x28"}, {{"t4"}, "x29"}, {{"t5"}, "x30"}, {{"t6"}, "x31"}};
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return llvm::makeArrayRef(GCCRegAliases);
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}
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void RISCVTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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Builder.defineMacro("__ELF__");
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Builder.defineMacro("__riscv");
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bool Is64Bit = getTriple().getArch() == llvm::Triple::riscv64;
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Builder.defineMacro("__riscv_xlen", Is64Bit ? "64" : "32");
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// TODO: modify when more code models and ABIs are supported.
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Builder.defineMacro("__riscv_cmodel_medlow");
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Builder.defineMacro("__riscv_float_abi_soft");
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if (HasM) {
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Builder.defineMacro("__riscv_mul");
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Builder.defineMacro("__riscv_div");
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Builder.defineMacro("__riscv_muldiv");
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}
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if (HasA)
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Builder.defineMacro("__riscv_atomic");
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if (HasF || HasD) {
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Builder.defineMacro("__riscv_flen", HasD ? "64" : "32");
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Builder.defineMacro("__riscv_fdiv");
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Builder.defineMacro("__riscv_fsqrt");
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}
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if (HasC)
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Builder.defineMacro("__riscv_compressed");
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}
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/// Return true if has this feature, need to sync with handleTargetFeatures.
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bool RISCVTargetInfo::hasFeature(StringRef Feature) const {
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bool Is64Bit = getTriple().getArch() == llvm::Triple::riscv64;
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return llvm::StringSwitch<bool>(Feature)
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.Case("riscv", true)
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.Case("riscv32", !Is64Bit)
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.Case("riscv64", Is64Bit)
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.Case("m", HasM)
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.Case("a", HasA)
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.Case("f", HasF)
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.Case("d", HasD)
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.Case("c", HasC)
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.Default(false);
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}
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/// Perform initialization based on the user configured set of features.
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bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
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DiagnosticsEngine &Diags) {
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for (const auto &Feature : Features) {
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if (Feature == "+m")
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HasM = true;
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else if (Feature == "+a")
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HasA = true;
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else if (Feature == "+f")
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HasF = true;
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else if (Feature == "+d")
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HasD = true;
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else if (Feature == "+c")
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HasC = true;
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}
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return true;
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}
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