maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen/AVR
History
Jun Bum Lim 90b6b5074a [CodeGenPrep] Skip merging empty case blocks 
This is recommit of r287553 after fixing the invalid loop info after eliminating an empty block and unit test failures in AVR and WebAssembly :

Summary: Merging an empty case block into the header block of switch could cause ISel to add COPY instructions in the header of switch, instead of the case block, if the case block is used as an incoming block of a PHI. This could potentially increase dynamic instructions, especially when the switch is in a loop. I added a test case which was reduced from the benchmark I was targetting.

Reviewers: t.p.northover, mcrosier, manmanren, wmi, joerg, davidxl

Subscribers: joerg, qcolombet, danielcdh, hfinkel, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D22696

llvm-svn: 289988
 		2016-12-16 20:38:39 +00:00
..
atomics [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
calling-conv/c [AVR] Add calling convention CodeGen tests 2016-12-11 07:09:45 +00:00
features [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
inline-asm [AVR] Fix and clean up the inline assembly tests 2016-12-10 11:49:07 +00:00
instrumentation [AVR] Support floats in the instrumention pass 2016-12-15 11:02:41 +00:00
integration [AVR] Add a test to validate a simple 'blinking led' program 2016-12-11 04:59:39 +00:00
pseudo [AVR] Explicitly set the target in all CodeGen tests 2016-12-10 11:23:16 +00:00
relax-mem [AVR] Add an 'relax memory operation' pass 2016-12-13 05:53:14 +00:00
add.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
alloca.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
and.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
brind.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
call.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
cmp.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
com.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
ctlz.ll [AVR] Fix basic block naming in ctlz and cttz tests 2016-11-16 22:48:38 +00:00
ctpop.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
cttz.ll [AVR] Fix basic block naming in ctlz and cttz tests 2016-11-16 22:48:38 +00:00
directmem.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
div.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
dynalloca.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
eor.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
expand-integer-failure.ll [AVR] Expand 'SELECT_CC' nodes whereever possible 2016-12-07 12:34:47 +00:00
frame.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
high-pressure-on-ptrregs.ll Un-XFAIL an AVR CodeGen test 2016-11-26 01:07:32 +00:00
impossible-reg-to-reg-copy.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
interrupts.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
io.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
issue-cannot-select-bswap.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
large-return-size.ll Allow a maximum of 64 bits to be returned in registers 2016-10-08 01:05:09 +00:00
lit.local.cfg [AVR] Remove some accidentally-commited code that broke the bots 2016-11-17 00:09:38 +00:00
load.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
lower-formal-arguments-assertion.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
mul.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
neg.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
or.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
progmem-extended.ll [AVR] Add tests for a large number of pseudo instructions 2016-12-09 07:49:04 +00:00
progmem.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
rem.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
return.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
runtime-trig.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
select-must-add-unconditional-jump.ll [CodeGenPrep] Skip merging empty case blocks 2016-12-16 20:38:39 +00:00
sext.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
shift.ll [AVR] Add a test for 64-bit left shifts 2016-12-16 11:40:00 +00:00
sign-extension.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
smul-with-overflow.ll [AVR] Expand MULHS for all types 2016-10-08 01:01:49 +00:00
store-undef.ll [AVR] Explicitly set the target in all CodeGen tests 2016-12-10 11:23:16 +00:00
store.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
sub.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
trunc.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
umul-with-overflow.ll [AVR] Expand MULHS for all types 2016-10-08 01:01:49 +00:00
varargs.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
xor.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
zext.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00