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AArch64
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GlobalISel: Merge G_PTR_MASK with llvm.ptrmask intrinsic
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2020-05-26 11:48:13 -04:00 |
AMDGPU
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AMDGPU/GlobalISel: Fix assert on 16-bit G_EXTRACT results
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2020-05-26 12:14:08 -04:00 |
ARC
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ARM
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[TargetPassConfig] Don't add alias analysis at optnone
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2020-05-23 10:35:03 +02:00 |
AVR
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[AVR] Fix I/O instructions on XMEGA
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2020-05-17 19:46:09 +12:00 |
BPF
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[BPF] Return fail if disassembled insn registers out of range
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2020-05-18 18:53:23 -07:00 |
Generic
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[FPEnv] Intrinsic llvm.roundeven
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2020-05-26 19:24:58 +07:00 |
Hexagon
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[ModuloSchedule] Fix epilogue peeling with illegal phi.
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2020-05-07 10:04:05 -07:00 |
Inputs
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Lanai
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MIR
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[AMDGPU] Avoid hard-coded line numbers in error message checks
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2020-04-23 21:06:09 +01:00 |
MSP430
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Mips
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Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
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2020-05-22 05:36:15 -06:00 |
NVPTX
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PowerPC
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[PowerPC][AIX] Spill CSRs to the ABI specified stack offsets.
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2020-05-26 12:24:29 -04:00 |
RISCV
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[RISCV] Support Constant Pools in Load/Store Peephole
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2020-05-11 19:20:38 +01:00 |
SPARC
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SystemZ
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[SystemZ] Eliminate the need to create a zero vector by reusing the VPERM mask.
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2020-05-19 09:37:19 +02:00 |
Thumb
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[ARM] Don't shrink STM if it would cause an unknown base register store
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2020-04-22 14:50:42 +01:00 |
Thumb2
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[ARM] MVE VMINV/VMAXV test additions. NFC
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2020-05-26 14:00:14 +01:00 |
VE
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[VE][NFC] Correct sjlj_expection test
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2020-05-25 09:49:37 +02:00 |
WebAssembly
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[WebAssembly] Fix bug in custom shuffle combine
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2020-05-19 12:54:15 -07:00 |
WinCFGuard
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WinEH
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X86
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[DAGCombiner] try to move splat after binop with splat constant
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2020-05-26 08:12:46 -04:00 |
XCore
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