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llvm-project/llvm/test/CodeGen/X86/GlobalISel
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Chandler Carruth 19618fc639 [x86] Introduce a pass to begin more systematically fixing PR36028 and similar issues. 
The key idea is to lower COPY nodes populating EFLAGS by scanning the
uses of EFLAGS and introducing dedicated code to preserve the necessary
state in a GPR. In the vast majority of cases, these uses are cmovCC and
jCC instructions. For such cases, we can very easily save and restore
the necessary information by simply inserting a setCC into a GPR where
the original flags are live, and then testing that GPR directly to feed
the cmov or conditional branch.

However, things are a bit more tricky if arithmetic is using the flags.
This patch handles the vast majority of cases that seem to come up in
practice: adc, adcx, adox, rcl, and rcr; all without taking advantage of
partially preserved EFLAGS as LLVM doesn't currently model that at all.

There are a large number of operations that techinaclly observe EFLAGS
currently but shouldn't in this case -- they typically are using DF.
Currently, they will not be handled by this approach. However, I have
never seen this issue come up in practice. It is already pretty rare to
have these patterns come up in practical code with LLVM. I had to resort
to writing MIR tests to cover most of the logic in this pass already.
I suspect even with its current amount of coverage of arithmetic users
of EFLAGS it will be a significant improvement over the current use of
pushf/popf. It will also produce substantially faster code in most of
the common patterns.

This patch also removes all of the old lowering for EFLAGS copies, and
the hack that forced us to use a frame pointer when EFLAGS copies were
found anywhere in a function so that the dynamic stack adjustment wasn't
a problem. None of this is needed as we now lower all of these copies
directly in MI and without require stack adjustments.

Lots of thanks to Reid who came up with several aspects of this
approach, and Craig who helped me work out a couple of things tripping
me up while working on this.

Differential Revision: https://reviews.llvm.org/D45146

llvm-svn: 329657
 		2018-04-10 01:41:17 +00:00
..
GV.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
add-scalar.ll [x86] Introduce a pass to begin more systematically fixing PR36028 and similar issues. 2018-04-10 01:41:17 +00:00
add-vec.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
and-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
ashr-scalar.ll [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
avoid-matchtable-crash.mir GlobalISel: Always check operand types when executing match table 2018-02-07 02:44:51 +00:00
binop.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
br.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
brcond.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
callingconv.ll [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
cmp.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
constant.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
ext-x86-64.ll [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
ext.ll [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
fadd-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
fconstant.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
fdiv-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
fmul-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
fpext-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
frameIndex.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
fsub-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
gep.ll [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
inttoptr.ll [GlobalIsel][X86] Support G_INTTOPTR instruction. 2018-02-28 12:11:53 +00:00
irtranslator-callingconv.ll [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
legalize-add-v128.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-add-v256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-add-v512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-add.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-and-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-ashr-scalar.mir [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
legalize-brcond.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-cmp.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-constant.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-ext-x86-64.mir [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
legalize-ext.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-fadd-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
legalize-fdiv-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
legalize-fmul-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
legalize-fpext-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
legalize-fsub-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
legalize-gep.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-insert-vec256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-insert-vec512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-lshr-scalar.mir [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
legalize-memop-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-mul-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-mul-v128.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-mul-v256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-mul-v512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-or-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-phi.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
legalize-shl-scalar.mir [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
legalize-sub-v128.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-sub-v256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-sub-v512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-sub.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
legalize-trunc.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-undef.mir [GISel]: Rework legalization algorithm for better elimination of 2017-11-14 22:42:19 +00:00
legalize-xor-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
lit.local.cfg
…
lshr-scalar.ll [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
memop-scalar-x32.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
memop-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
memop-vec.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
mul-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
mul-vec.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
or-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
phi.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
ptrtoint.ll [GlobalIsel][X86] Support G_PTRTOINT instruction. 2018-02-28 09:18:47 +00:00
regbankselect-AVX2.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
regbankselect-AVX512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
regbankselect-X32.mir
…
regbankselect-X86_64.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-GV.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-add-v128.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-add-v256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-add-v512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-add-x32.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-add.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-and-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-ashr-scalar.mir [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
select-blsi.mir [GISel]: Make GlobalISelEmitter rule prioritization compatible with selectionDAG 2018-02-16 22:37:15 +00:00
select-blsr.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-br.mir [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
select-brcond.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-cmp.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-constant.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-copy.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-ext-x86-64.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-ext.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-extract-vec256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-extract-vec512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-fadd-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-fconstant.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-fdiv-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-fmul-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-fpext-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-fsub-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-gep.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-inc.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-insert-vec256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-insert-vec512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-intrinsic-x86-flags-read-u32.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-leaf-constant.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-lshr-scalar.mir [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
select-memop-scalar-x32.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-memop-scalar.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-memop-v128.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-memop-v256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-memop-v512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-merge-vec256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-merge-vec512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-mul-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-mul-vec.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-or-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-phi.mir [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775 2018-02-08 22:41:47 +00:00
select-shl-scalar.mir [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
select-sub-v128.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-sub-v256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-sub-v512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-sub.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-trunc.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-undef.mir [GlobalIsel][X86] Making {G_IMPLICIT_DEF, s128} legal 2018-02-08 22:40:31 +00:00
select-unmerge-vec256.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-unmerge-vec512.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
select-xor-scalar.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
shl-scalar.ll [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL 2018-03-14 11:23:57 +00:00
sub-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
sub-vec.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
trunc.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
undef.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
x32-select-frameIndex.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
x86-legalize-GV.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
x86-legalize-inttoptr.mir [GlobalIsel][X86] Support G_INTTOPTR instruction. 2018-02-28 12:11:53 +00:00
x86-legalize-ptrtoint.mir [GlobalIsel][X86] Support G_PTRTOINT instruction. 2018-02-28 09:18:47 +00:00
x86-legalize-sdiv.mir [GlobalIsel][X86] Support for G_SDIV instruction 2018-03-14 15:41:11 +00:00
x86-select-frameIndex.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
x86-select-inttoptr.mir [GlobalIsel][X86] Support G_INTTOPTR instruction. 2018-02-28 12:11:53 +00:00
x86-select-ptrtoint.mir [GlobalIsel][X86] Support G_PTRTOINT instruction. 2018-02-28 09:18:47 +00:00
x86-select-sdiv.mir [GlobalIsel][X86] Support for G_SDIV instruction 2018-03-14 15:41:11 +00:00
x86_64-fallback.ll [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
x86_64-irtranslator.ll [GlobalIsel][X86] Support for G_SDIV instruction 2018-03-14 15:41:11 +00:00
x86_64-legalize-GV.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
x86_64-legalize-inttoptr.mir [GlobalIsel][X86] Support G_INTTOPTR instruction. 2018-02-28 12:11:53 +00:00
x86_64-legalize-ptrtoint.mir [GlobalIsel][X86] Support G_PTRTOINT instruction. 2018-02-28 09:18:47 +00:00
x86_64-legalize-sdiv.mir [GlobalIsel][X86] Support for G_SDIV instruction 2018-03-14 15:41:11 +00:00
x86_64-legalize-zext.mir [GlobalIsel][X86] Support for G_ZEXT instruction 2018-03-14 09:11:23 +00:00
x86_64-select-frameIndex.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
x86_64-select-inttoptr.mir [GlobalIsel][X86] Support G_INTTOPTR instruction. 2018-02-28 12:11:53 +00:00
x86_64-select-ptrtoint.mir [GlobalIsel][X86] Support G_PTRTOINT instruction. 2018-02-28 09:18:47 +00:00
x86_64-select-sdiv.mir [GlobalIsel][X86] Support for G_SDIV instruction 2018-03-14 15:41:11 +00:00
x86_64-select-zext.mir [GlobalIsel][X86] Support for G_ZEXT instruction 2018-03-14 09:11:23 +00:00
xor-scalar.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00