llvm-project/llvm/utils/TableGen
Jakob Stoklund Olesen c2272df1be Infer instruction properties from single-instruction patterns.
Previously, instructions without a primary patterns wouldn't get their
properties inferred. Now, we use all single-instruction patterns for
inference, including 'def : Pat<>' instances.

This causes a lot of instruction flags to change.

- Many instructions no longer have the UnmodeledSideEffects flag because
  their flags are now inferred from a pattern.

- Instructions with intrinsics will get a mayStore flag if they already
  have UnmodeledSideEffects and a mayLoad flag if they already have
  mayStore. This is because intrinsics properties are linear.

- Instructions with atomic_load patterns get a mayStore flag because
  atomic loads can't be reordered. The correct workaround is to create
  pseudo-instructions instead of using normal loads. PR13693.

llvm-svn: 162614
2012-08-24 22:46:53 +00:00
..
AsmMatcherEmitter.cpp Print out the location of expanded multiclass defs in TableGen errors. 2012-08-22 23:33:58 +00:00
AsmWriterEmitter.cpp Clean up includes. 2012-07-27 06:44:02 +00:00
AsmWriterInst.cpp Move TableGen's parser and entry point into a library 2011-10-01 16:41:13 +00:00
AsmWriterInst.h trailing whitespace cleanup 2010-10-11 19:38:01 +00:00
CMakeLists.txt I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CallingConvEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
CodeEmitterGen.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
CodeGenDAGPatterns.cpp Infer instruction properties from single-instruction patterns. 2012-08-24 22:46:53 +00:00
CodeGenDAGPatterns.h Convert assert(0) to llvm_unreachable 2012-02-05 07:21:30 +00:00
CodeGenInstruction.cpp Heed guessInstructionProperties, and stop warning on redundant flags. 2012-08-24 00:31:16 +00:00
CodeGenInstruction.h Heed guessInstructionProperties, and stop warning on redundant flags. 2012-08-24 00:31:16 +00:00
CodeGenIntrinsics.h rdar://11542750 - llvm.trap should be marked no return. 2012-05-27 23:20:41 +00:00
CodeGenRegisters.cpp Print out the location of expanded multiclass defs in TableGen errors. 2012-08-22 23:33:58 +00:00
CodeGenRegisters.h Make synthesized sub-register indexes available in the target namespace. 2012-08-15 18:00:55 +00:00
CodeGenSchedule.cpp I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeGenSchedule.h I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeGenTarget.cpp Add CodeGenTarget::guessInstructionProperties. 2012-08-23 19:34:41 +00:00
CodeGenTarget.h Add CodeGenTarget::guessInstructionProperties. 2012-08-23 19:34:41 +00:00
DAGISelEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
DAGISelMatcher.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
DAGISelMatcher.h Fix a typo (the the => the) 2012-07-23 08:51:15 +00:00
DAGISelMatcherEmitter.cpp TblGen: Tweak to pretty-print DAGISel.inc a bit better. 2012-07-18 22:41:03 +00:00
DAGISelMatcherGen.cpp Teach TableGen to put chains on more instructions 2012-06-26 18:46:28 +00:00
DAGISelMatcherOpt.cpp Remove unused STL header includes. 2011-04-23 19:53:52 +00:00
DFAPacketizerEmitter.cpp Fix Windows build after r159281: s/iterator/const_iterator 2012-06-28 07:47:50 +00:00
DisassemblerEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
EDEmitter.cpp Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas. 2012-07-18 04:11:12 +00:00
FastISelEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
FixedLenDecoderEmitter.cpp Declare some for loop indices inside the for loop statement. 2012-08-17 05:42:16 +00:00
InstrInfoEmitter.cpp Add an MCID::Select flag and TII hooks for optimizing selects. 2012-08-16 23:11:47 +00:00
IntrinsicEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
LLVMBuild.txt LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
Makefile Build system infrastructure for multiple tblgens. 2011-10-06 01:51:51 +00:00
PseudoLoweringEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
RegisterInfoEmitter.cpp Make synthesized sub-register indexes available in the target namespace. 2012-08-15 18:00:55 +00:00
SequenceToOffsetTable.h Fix a bunch of -Wdocumentation warnings. 2012-08-23 16:54:08 +00:00
SetTheory.cpp Teach tblgen's set theory "sequence" operator to support an optional stride operand. 2012-05-24 21:37:08 +00:00
SetTheory.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
StringToOffsetTable.h Add some missing includes for the build against stdcxx. 2012-08-10 10:53:56 +00:00
SubtargetEmitter.cpp Added MispredictPenalty to SchedMachineModel. 2012-08-08 02:44:16 +00:00
TGValueTypes.cpp Revert pragma clang suppressions that confuse GCC. (I'll worry about how to suppress/fix these problems properly when we figure out how to keep LLVM -Wweak-vtables clean) 2011-12-20 08:22:49 +00:00
TableGen.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
TableGenBackends.h Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
X86DisassemblerShared.h Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 2012-08-01 07:39:18 +00:00
X86DisassemblerTables.cpp Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 2012-08-01 07:39:18 +00:00
X86DisassemblerTables.h Remove trailing whitespace 2012-07-31 05:28:41 +00:00
X86ModRMFilters.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
X86ModRMFilters.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
X86RecognizableInstr.cpp Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code. 2012-07-30 06:48:11 +00:00
X86RecognizableInstr.h Fix a bunch of -Wdocumentation warnings. 2012-08-23 16:54:08 +00:00