Kristof Beyls eecb353d0e [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). ... The benchmarking summarized in http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed this is beneficial for a wide range of cores. As is to be expected, quite a few small adaptations are needed to the regressions tests, as the difference in scheduling results in: - Quite a few small instruction schedule differences. - A few changes in register allocation decisions caused by different instruction schedules. - A few changes in IfConversion decisions, due to a difference in instruction schedule and/or the estimated cost of a branch mispredict. llvm-svn: 306514		2017-06-28 07:07:03 +00:00
..
GlobalISel	[ARM] GlobalISel: Support G_SELECT for pointers	2017-06-27 10:29:50 +00:00
Windows	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
2006-11-10-CycleInDAG.ll	…
2007-01-19-InfiniteLoop.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
2007-03-07-CombinerCrash.ll	…
2007-03-13-InstrSched.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
2007-03-21-JoinIntervalsCrash.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2007-03-27-RegScavengerAssert.ll	…
2007-03-30-RegScavengerAssert.ll	…
2007-04-02-RegScavengerAssert.ll	…
2007-04-03-PEIBug.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2007-04-03-UndefinedSymbol.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
2007-04-30-CombinerCrash.ll	…
2007-05-03-BadPostIndexedLd.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2007-05-07-tailmerge-1.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2007-05-09-tailmerge-2.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2007-05-14-InlineAsmCstCrash.ll	…
2007-05-14-RegScavengerAssert.ll	…
2007-05-22-tailmerge-3.ll	Codegen: Make chains from trellis-shaped CFGs	2017-02-15 19:49:14 +00:00
2007-05-23-BadPreIndexedStore.ll	…
2007-08-15-ReuseBug.ll	…
2008-02-04-LocalRegAllocBug.ll	…
2008-02-29-RegAllocLocal.ll	…
2008-03-05-SxtInRegBug.ll	…
2008-03-07-RegScavengerAssert.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2008-04-04-ScavengerAssert.ll	…
2008-04-10-ScavengerAssert.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2008-04-11-PHIofImpDef.ll	…
2008-05-19-LiveIntervalsBug.ll	…
2008-05-19-ScavengerAssert.ll	…
2008-07-17-Fdiv.ll	…
2008-07-24-CodeGenPrepCrash.ll	…
2008-08-07-AsmPrintBug.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
2008-09-17-CoalescerBug.ll	…
2008-11-18-ScavengerAssert.ll	…
2009-02-16-SpillerBug.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2009-02-22-SoftenFloatVaArg.ll	…
2009-02-27-SpillerBug.ll	…
2009-03-07-SpillerBug.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
2009-03-09-AddrModeBug.ll	…
2009-04-06-AsmModifier.ll	…
2009-04-08-AggregateAddr.ll	…
2009-04-08-FREM.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2009-04-08-FloatUndef.ll	…
2009-04-09-RegScavengerAsm.ll	…
2009-05-05-DAGCombineBug.ll	…
2009-05-07-RegAllocLocal.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2009-05-11-CodePlacementCrash.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2009-05-18-InlineAsmMem.ll	[ARM] Avoid using ARM instructions in Thumb mode	2017-01-31 14:35:01 +00:00
2009-06-02-ISelCrash.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2009-06-04-MissingLiveIn.ll	…
2009-06-15-RegScavengerAssert.ll	…
2009-06-19-RegScavengerAssert.ll	…
2009-06-22-CoalescerBug.ll	…
2009-06-30-RegScavengerAssert.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2009-06-30-RegScavengerAssert2.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2009-06-30-RegScavengerAssert3.ll	…
2009-06-30-RegScavengerAssert4.ll	…
2009-06-30-RegScavengerAssert5.ll	…
2009-07-01-CommuteBug.ll	…
2009-07-09-asm-p-constraint.ll	…
2009-07-18-RewriterBug.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
2009-07-22-ScavengerAssert.ll	…
2009-07-22-SchedulerAssert.ll	…
2009-07-29-VFP3Registers.ll	…
2009-08-02-RegScavengerAssert-Neon.ll	…
2009-08-04-RegScavengerAssert-2.ll	…
2009-08-04-RegScavengerAssert.ll	…
2009-08-15-RegScavenger-EarlyClobber.ll	…
2009-08-15-RegScavengerAssert.ll	…
2009-08-21-PostRAKill.ll	…
2009-08-21-PostRAKill2.ll	…
2009-08-21-PostRAKill3.ll	…
2009-08-26-ScalarToVector.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
2009-08-27-ScalarToVector.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
2009-08-29-ExtractEltf32.ll	…
2009-08-29-TooLongSplat.ll	…
2009-08-31-LSDA-Name.ll	CodeGen: avoid emitting unnecessary CFI	2016-07-15 21:10:29 +00:00
2009-08-31-TwoRegShuffle.ll	…
2009-09-09-AllOnes.ll	…
2009-09-09-fpcmp-ole.ll	…
2009-09-10-postdec.ll	…
2009-09-13-InvalidSubreg.ll	…
2009-09-13-InvalidSuperReg.ll	…
2009-09-20-LiveIntervalsBug.ll	…
2009-09-21-LiveVariablesBug.ll	…
2009-09-22-LiveVariablesBug.ll	…
2009-09-23-LiveVariablesBug.ll	…
2009-09-24-spill-align.ll	…
2009-09-27-CoalescerBug.ll	…
2009-09-28-LdStOptiBug.ll	…
2009-10-02-NEONSubregsBug.ll	…
2009-10-16-Scope.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
2009-10-27-double-align.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2009-10-30.ll	…
2009-11-01-NeonMoves.ll	…
2009-11-02-NegativeLane.ll	…
2009-11-07-SubRegAsmPrinting.ll	…
2009-11-13-CoalescerCrash.ll	…
2009-11-13-ScavengerAssert.ll	…
2009-11-13-ScavengerAssert2.ll	…
2009-11-13-VRRewriterCrash.ll	…
2009-11-30-LiveVariablesBug.ll	…
2009-12-02-vtrn-undef.ll	…
2010-03-04-eabi-fp-spill.ll	…
2010-03-04-stm-undef-addr.ll	…
2010-03-18-ldm-rtrn.ll	…
2010-04-09-NeonSelect.ll	…
2010-04-13-v2f64SplitArg.ll	…
2010-04-14-SplitVector.ll	…
2010-04-15-ScavengerDebugValue.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
2010-05-14-IllegalType.ll	…
2010-05-17-FastAllocCrash.ll	…
2010-05-18-LocalAllocCrash.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2010-05-18-PostIndexBug.ll	…
2010-05-19-Shuffles.ll	…
2010-05-20-NEONSpillCrash.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2010-05-21-BuildVector.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2010-06-11-vmovdrr-bitcast.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2010-06-21-LdStMultipleBug.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2010-06-21-nondarwin-tc.ll	[opaque pointer type] Add textual IR support for explicit type parameter for global aliases	2015-09-11 03:22:04 +00:00
2010-06-25-Thumb2ITInvalidIterator.ll	Renumber testcase metadata nodes after r290153.	2016-12-22 00:45:21 +00:00
2010-06-29-PartialRedefFastAlloc.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2010-06-29-SubregImpDefs.ll	…
2010-07-26-GlobalMerge.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
2010-08-04-EHCrash.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
2010-08-04-StackVariable.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
2010-09-21-OptCmpBug.ll	…
2010-10-25-ifcvt-ldm.ll	…
2010-11-15-SpillEarlyClobber.ll	…
2010-11-29-PrologueBug.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
2010-12-07-PEIBug.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
2010-12-08-tpsoft.ll	…
2010-12-15-elf-lcomm.ll	[GlobalMerge] Look at uses to create smaller global sets.	2015-04-18 01:21:58 +00:00
2010-12-17-LocalStackSlotCrash.ll	…
2011-01-19-MergedGlobalDbg.ll	Renumber testcase metadata nodes after r290153.	2016-12-22 00:45:21 +00:00
2011-02-04-AntidepMultidef.ll	Elide stores which are overwritten without being observed.	2017-05-16 19:43:56 +00:00
2011-02-07-AntidepClobber.ll	…
2011-03-10-DAGCombineCrash.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
2011-03-15-LdStMultipleBug.ll	…
2011-03-23-PeepholeBug.ll	Codegen: Tail-duplicate during placement.	2016-10-11 20:36:43 +00:00
2011-04-07-schediv.ll	…
2011-04-11-MachineLICMBug.ll	…
2011-04-12-AlignBug.ll	…
2011-04-12-FastRegAlloc.ll	…
2011-04-15-AndVFlagPeepholeBug.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
2011-04-15-RegisterCmpPeephole.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
2011-04-26-SchedTweak.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
2011-04-27-IfCvtBug.ll	…
2011-05-04-MultipleLandingPadSuccs.ll	[Verifier] Add verification for TBAA metadata	2016-12-11 20:07:15 +00:00
2011-06-09-TailCallByVal.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
2011-06-16-TailCallByVal.ll	…
2011-06-29-MergeGlobalsAlign.ll	Revert "Use private linkage for MergedGlobals variables" on Darwin.	2016-11-11 17:50:09 +00:00
2011-07-10-GlobalMergeBug.ll	…
2011-08-02-MergedGlobalDbg.ll	Renumber testcase metadata nodes after r290153.	2016-12-22 00:45:21 +00:00
2011-08-12-vmovqqqq-pseudo.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2011-08-25-ldmia_ret.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
2011-08-29-SchedCycle.ll	…
2011-08-29-ldr_pre_imm.ll	…
2011-09-09-OddVectorDivision.ll	…
2011-09-19-cpsr.ll	…
2011-09-28-CMovCombineBug.ll	…
2011-10-26-ExpandUnalignedLoadCrash.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2011-10-26-memset-inline.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
2011-10-26-memset-with-neon.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
2011-11-07-PromoteVectorLoadStore.ll	…
2011-11-09-BitcastVectorDouble.ll	…
2011-11-09-IllegalVectorFPIntConvert.ll	…
2011-11-14-EarlyClobber.ll	…
2011-11-28-DAGCombineBug.ll	…
2011-11-29-128bitArithmetics.ll	…
2011-11-30-MergeAlignment.ll	…
2011-12-14-machine-sink.ll	…
2011-12-19-sjlj-clobber.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
2012-01-23-PostRA-LICM.ll	…
2012-01-24-RegSequenceLiveRange.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2012-01-26-CoalescerBug.ll	…
2012-01-26-CopyPropKills.ll	…
2012-02-01-CoalescerBug.ll	…
2012-03-05-FPSCR-bug.ll	…
2012-03-13-DAGCombineBug.ll	…
2012-03-26-FoldImmBug.ll	…
2012-04-02-TwoAddrInstrCrash.ll	…
2012-04-10-DAGCombine.ll	…
2012-04-24-SplitEHCriticalEdge.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
2012-05-04-vmov.ll	…
2012-05-10-PreferVMOVtoVDUP32.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2012-05-29-TailDupBug.ll	…
2012-06-12-SchedMemLatency.ll	ScheduleDAG: Match enum names when printing sdep kinds	2016-09-23 18:28:31 +00:00
2012-08-04-DtripleSpillReload.ll	…
2012-08-08-legalize-unaligned.ll	…
2012-08-09-neon-extload.ll	…
2012-08-13-bfi.ll	…
2012-08-23-legalize-vmull.ll	…
2012-08-27-CopyPhysRegCrash.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2012-08-30-select.ll	Don't conditionalize Neon instructions, even in IT blocks.	2017-06-22 12:11:38 +00:00
2012-09-18-ARMv4ISelBug.ll	…
2012-09-25-InlineAsmScalarToVectorConv.ll	…
2012-09-25-InlineAsmScalarToVectorConv2.ll	[SelectionDAG] Remove exit-on-error flag from test (PR27765)	2016-06-14 07:30:20 +00:00
2012-10-04-AAPCS-byval-align8.ll	Elide stores which are overwritten without being observed.	2017-05-16 19:43:56 +00:00
2012-10-04-FixedFrame-vs-byval.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2012-10-04-LDRB_POST_IMM-Crash.ll	…
2012-10-18-PR14099-ByvalFrameAddress.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
2012-11-14-subs_carry.ll	[SelectionDAG] Swap commutative binops before constant-based folding	2015-09-06 05:42:13 +00:00
2013-01-21-PR14992.ll	…
2013-02-27-expand-vfma.ll	…
2013-04-05-Small-ByVal-Structs-PR15293.ll	…
2013-04-16-AAPCS-C4-vs-VFP.ll	…
2013-04-16-AAPCS-C5-vs-VFP.ll	ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.	2015-04-23 20:31:26 +00:00
2013-04-18-load-overlap-PR14824.ll	…
2013-04-21-AAPCS-VA-C.1.cp.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	2015-07-21 00:18:59 +00:00
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll	ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.	2015-04-23 20:31:26 +00:00
2013-05-05-IfConvertBug.ll	…
2013-05-07-ByteLoadSameAddress.ll	…
2013-05-13-AAPCS-byval-padding.ll	…
2013-05-13-AAPCS-byval-padding2.ll	ARMLoadStoreOptimizer: Rewrite LDM/STM matching logic.	2015-07-10 18:08:49 +00:00
2013-05-13-DAGCombiner-undef-mask.ll	…
2013-05-31-char-shift-crash.ll	…
2013-06-03-ByVal-2Kbytes.ll	…
2013-07-29-vector-or-combine.ll	…
2013-10-11-select-stalls.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2013-11-08-inline-asm-neon-array.ll	…
2014-01-09-pseudo_expand_implicit_reg.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
2014-02-05-vfp-regs-after-stack.ll	…
2014-02-21-byval-reg-split-alignment.ll	…
2014-05-14-DwarfEHCrash.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
2014-07-18-earlyclobber-str-post.ll	…
2014-08-04-muls-it.ll	…
2015-01-21-thumbv4t-ldstr-opt.ll	…
2016-05-01-RegScavengerAssert.ll	[ARM] Fix Scavenger assert due to underestimated stack size	2016-05-08 05:11:54 +00:00
2016-08-24-ARM-LDST-dbginfo-bug.ll	Handle empty functions with debug info in load/store opt pass	2016-08-26 13:00:39 +00:00
ARMLoadStoreDBG.mir	MIParser/MIRPrinter: Compute block successors if not explicitely specified	2017-05-05 21:09:30 +00:00
DbgValueOtherTargets.test	…
MachO-subtypes.ll	[ARM] Fix MachO CPU Subtype selection	2015-08-21 21:52:48 +00:00
MergeConsecutiveStores.ll	…
PR15053.ll	…
a15-SD-dep.ll	…
a15-mla.ll	…
a15-partial-update.ll	…
a15.ll	…
aapcs-hfa-code.ll	…
aapcs-hfa.ll	…
acle-intrinsics-v5.ll	[ARM] ACLE Chapter 9 intrinsics	2017-05-04 07:31:28 +00:00
acle-intrinsics.ll	[ARM] ACLE Chapter 9 intrinsics	2017-05-04 07:31:28 +00:00
addrmode.ll	…
addrspacecast.ll	…
adv-copy-opt.ll	ARM: Enable MachineScheduler and disable PostRAScheduler for swift.	2015-07-17 23:18:30 +00:00
aeabi-read-tp.ll	ARM: support `-mlong-calls` with AEABI TLS on ELF	2017-01-29 16:46:22 +00:00
aggregate-padding.ll	…
alias_store.ll	Fix PR31896.	2017-02-21 20:17:34 +00:00
aliases.ll	[opaque pointer type] Add textual IR support for explicit type parameter for global aliases	2015-09-11 03:22:04 +00:00
align-sp-adjustment.ll	Revert "[ARM] Mark LEApcrel instructions as isAsCheapAsAMove"	2017-05-16 17:59:07 +00:00
align.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
alloc-no-stack-realign.ll	ARM: handle post-indexed NEON ops where the offset isn't the access width.	2017-04-20 19:54:02 +00:00
alloca-align.ll	RegScavenging: Add scavengeRegisterBackwards()	2017-06-17 02:08:18 +00:00
alloca.ll	…
and-cmpz.ll	[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently	2016-12-15 09:38:59 +00:00
apcs-vfp.ll	ARM: add extra test for watchOS ABI	2015-10-30 16:29:44 +00:00
arg-copy-elide.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
argaddr.ll	…
arguments-nosplit-double.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
arguments-nosplit-i64.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
arguments.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
arguments2.ll	…
arguments3.ll	…
arguments4.ll	…
arguments5.ll	…
arguments6.ll	…
arguments7.ll	…
arguments8.ll	…
arguments_f64_backfill.ll	…
arm-abi-attr.ll	…
arm-and-tst-peephole.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
arm-asm.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
arm-eabi.ll	Add support for musl-libc on ARM Linux.	2016-06-24 21:14:33 +00:00
arm-frame-lowering-no-terminator.ll	ARM: Avoid dereferencing end() in ARMFrameLowering::emitEpilogue	2016-08-21 00:08:10 +00:00
arm-frameaddr.ll	…
arm-modifier.ll	…
arm-negative-stride.ll	…
arm-position-independence-jump-table.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
arm-position-independence.ll	[ARM] Make RWPI use movw/movt when available	2017-02-07 13:07:12 +00:00
arm-returnaddr.ll	PrologEpilogInserter: Rewrite API to determine callee save regsiters.	2015-07-14 17:17:13 +00:00
arm-shrink-wrapping-linux.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
arm-shrink-wrapping.ll	Fix test broken by r304020	2017-05-26 22:11:18 +00:00
arm-ttype-target2.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
arm32-round-conv.ll	…
arm32-rounding.ll	Revert "CodeGen: ensure that libcalls are always AAPCS CC"	2016-09-07 03:17:19 +00:00
armv4.ll	…
atomic-64bit.ll	ARM: Better codegen for 64-bit compares.	2016-03-21 18:00:02 +00:00
atomic-cmp.ll	[ARM] Emit clrex in the expanded cmpxchg fail block.	2015-09-22 17:22:58 +00:00
atomic-cmpxchg.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
atomic-load-store.ll	…
atomic-op.ll	CodeGen: Allow small copyable blocks to "break" the CFG.	2017-01-31 23:48:32 +00:00
atomic-ops-v8.ll	CodeGen: Allow small copyable blocks to "break" the CFG.	2017-01-31 23:48:32 +00:00
atomicrmw_minmax.ll	…
available_externally.ll	…
avoid-cpsr-rmw.ll	[SimplifyCFG] Rewrite SinkThenElseCodeToEnd	2016-08-22 19:07:15 +00:00
bfc.ll	…
bfi.ll	[ARM] Prefer BIC over BFC in ARM mode.	2017-04-07 22:01:23 +00:00
bfx.ll	[ARM] Add additional matching for UBFX instructions	2016-06-01 12:01:01 +00:00
bic.ll	[ARM] Prefer BIC over BFC in ARM mode.	2017-04-07 22:01:23 +00:00
bicZext.ll	…
big-endian-eh-unwind.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
big-endian-neon-bitconv.ll	…
big-endian-neon-extend.ll	…
big-endian-neon-trunc-store.ll	…
big-endian-ret-f64.ll	…
big-endian-vector-callee.ll	[ARM] Split 128-bit vectors in BUILD_VECTOR lowering	2016-12-14 20:44:38 +00:00
big-endian-vector-caller.ll	…
bit-reverse-to-rbit.ll	RBIT Instruction only available for ARMv6t2 and above.	2016-01-08 18:43:41 +00:00
bits.ll	…
bool-ext-inc.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
bswap-inline-asm.ll	…
bswap16.ll	…
build-attributes-encoding.s	[ARM] Add DSP build attribute and extension targeting	2016-01-25 11:26:11 +00:00
build-attributes-fn-attr0.ll	[llvm] Remove redundant --check-prefix=CHECK from tests	2016-10-24 18:57:55 +00:00
build-attributes-fn-attr1.ll	[llvm] Remove redundant --check-prefix=CHECK from tests	2016-10-24 18:57:55 +00:00
build-attributes-fn-attr2.ll	[llvm] Remove redundant --check-prefix=CHECK from tests	2016-10-24 18:57:55 +00:00
build-attributes-fn-attr3.ll	[llvm] Remove redundant --check-prefix=CHECK from tests	2016-10-24 18:57:55 +00:00
build-attributes-fn-attr4.ll	[llvm] Remove redundant --check-prefix=CHECK from tests	2016-10-24 18:57:55 +00:00
build-attributes-fn-attr5.ll	Reapply r284571 (with the new tests fixed).	2016-10-19 13:43:02 +00:00
build-attributes-fn-attr6.ll	This is a 1 character fix for an ARM build attribute test (r284571): the	2016-11-01 15:59:37 +00:00
build-attributes-optimization-minsize.ll	[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.	2015-12-07 14:22:39 +00:00
build-attributes-optimization-mixed.ll	[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.	2015-12-07 14:22:39 +00:00
build-attributes-optimization-optnone.ll	[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.	2015-12-07 14:22:39 +00:00
build-attributes-optimization-optsize.ll	[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.	2015-12-07 14:22:39 +00:00
build-attributes-optimization.ll	[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.	2015-12-07 14:22:39 +00:00
build-attributes.ll	ARM: add arm1176j-f processor	2017-05-02 19:06:13 +00:00
bx_fold.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
byval-align.ll	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	2015-07-21 00:18:59 +00:00
byval_load_align.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
cache-intrinsic.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
call-noret-minsize.ll	…
call-noret.ll	…
call-tc.ll	[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently	2016-12-15 09:38:59 +00:00
call.ll	Don't print (PLT) on arm.	2016-06-16 16:09:53 +00:00
call_nolink.ll	…
carry.ll	Address buildbot fallout from r259065	2016-01-28 18:59:04 +00:00
cdp.ll	[ARM] Add cdp intrinsic tests.	2016-05-19 12:59:17 +00:00
cdp2.ll	[ARM] Add cdp intrinsic tests.	2016-05-19 12:59:17 +00:00
cfi-alignment.ll	ARM: add support for WatchOS's compact unwind information.	2015-10-28 22:56:36 +00:00
clang-section.ll	Add support for #pragma clang section	2017-06-05 10:09:13 +00:00
clz.ll	…
cmn.ll	…
cmp1-peephole-thumb.mir	MIParser/MIRPrinter: Compute block successors if not explicitely specified	2017-05-05 21:09:30 +00:00
cmp2-peephole-thumb.mir	MIParser/MIRPrinter: Compute block successors if not explicitely specified	2017-05-05 21:09:30 +00:00
cmpxchg-O0.ll	ARM: Fix cmpxchg O0 expansion	2017-05-31 01:21:35 +00:00
cmpxchg-idioms.ll	ARM: sink atomic release barrier as far as possible into cmpxchg.	2016-02-22 20:55:50 +00:00
cmpxchg-weak.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
coalesce-dbgvalue.ll	Renumber testcase metadata nodes after r290153.	2016-12-22 00:45:21 +00:00
coalesce-subregs.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
code-placement.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
combine-movc-sub.ll	[ARM] optimizeSelect should clear kill flags.	2015-04-30 23:57:47 +00:00
combine-vmovdrr.ll	[ARM] When a bitcast is about to be turned into a VMOVDRR, try to combine it	2015-12-04 01:53:14 +00:00
commute-movcc.ll	…
compare-call.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
constant-island-crash.ll	[Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables	2016-11-01 13:37:41 +00:00
constant-islands.ll	…
constantfp.ll	[ARM] Support constant pools in data when generating execute-only code.	2017-06-20 07:20:52 +00:00
constantpool-align.ll	[SDAG] Use ABI type alignment for constant pools when optimizing for size	2016-10-17 12:54:07 +00:00
constantpool-promote-dbg.ll	[ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation	2017-05-23 19:38:37 +00:00
constantpool-promote-ldrh.ll	[ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation	2017-05-23 19:38:37 +00:00
constantpool-promote.ll	[ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation	2017-05-23 19:38:37 +00:00
constants.ll	AsmPrinter: Use emitGlobalConstantFP to emit elements of constant data	2015-12-08 02:37:48 +00:00
copy-cpsr.ll	…
copy-paired-reg.ll	…
cortex-a57-misched-alu.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortex-a57-misched-basic.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
cortex-a57-misched-ldm-wrback.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortex-a57-misched-ldm.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortex-a57-misched-stm-wrback.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortex-a57-misched-stm.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortex-a57-misched-vfma.ll	[ARM] Add scheduling classes for VFNM[AS]	2017-06-13 13:04:32 +00:00
cortex-a57-misched-vldm-wrback.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortex-a57-misched-vldm.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortex-a57-misched-vstm-wrback.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortex-a57-misched-vstm.ll	[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)	2017-06-02 08:53:19 +00:00
cortexr52-misched-basic.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
crash-O0.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
crash-greedy-v6.ll	…
crash-greedy.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
crash-shufflevector.ll	…
crash.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
crc32.ll	…
cse-call.ll	…
cse-flags.ll	[SelectionDAG] CSE nodes with differing SDNodeFlags	2016-01-15 21:56:40 +00:00
cse-ldrlit.ll	…
cse-libcalls.ll	…
ctor_order.ll	Use the correct ctor/dtor section for dynamic-no-pic.	2016-08-29 12:47:22 +00:00
ctors_dtors.ll	…
cttz.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
cttz_vector.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
cxx-tlscc.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
dag-combine-ldst.ll	Elide stores which are overwritten without being observed.	2017-05-16 19:43:56 +00:00
dagcombine-anyexttozeroext.ll	[DAGCombine] Catch the case where extract_vector_elt can cause an any_ext while processing AND SDNodes	2016-03-21 11:43:46 +00:00
dagcombine-concatvector.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
darwin-eabi.ll	…
darwin-tls-preserved.ll	ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.	2017-04-19 18:07:54 +00:00
darwin-tls.ll	ARM: put extern __thread stubs in a special section.	2016-04-25 21:12:04 +00:00
data-in-code-annotations.ll	…
dbg-range-extension.mir	MIParser/MIRPrinter: Compute block successors if not explicitely specified	2017-05-05 21:09:30 +00:00
dbg.ll	…
debug-frame-large-stack.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
debug-frame-no-debug.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
debug-frame-vararg.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
debug-frame.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
debug-info-arg.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
debug-info-blocks.ll	Align definition of DW_OP_plus with DWARF spec [3/3]	2017-06-14 13:14:38 +00:00
debug-info-branch-folding.ll	[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently	2016-12-15 09:38:59 +00:00
debug-info-d16-reg.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
debug-info-no-frame.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
debug-info-qreg.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
debug-info-s16-reg.ll	PR32288: More efficient encoding for DWARF expr subregister access.	2017-03-16 17:14:56 +00:00
debug-info-sreg2.ll	PR32288: More efficient encoding for DWARF expr subregister access.	2017-03-16 17:14:56 +00:00
debug-segmented-stacks.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
debugtrap.ll	[ARM] Emit trap instruction using .inst directive	2016-01-29 10:23:32 +00:00
default-float-abi.ll	Add support for musl-libc on ARM Linux.	2016-06-24 21:14:33 +00:00
default-reloc.ll	Fix default reloc model on ARM.	2016-05-28 10:41:15 +00:00
deprecated-asm.s	Summary: Currently there is no way to disable deprecated warning from asm like this	2016-12-05 23:55:13 +00:00
deps-fix.ll	…
disable-fp-elim.ll	Stop resetting NoFramePointerElim in TargetMachine::resetTargetOptions.	2015-05-23 01:14:08 +00:00
disable-tail-calls.ll	Add explicit -mtriple=arm-unknown to llvm/test/CodeGen/ARM/disable-tail-calls.ll, to satisfy *-win32.	2015-06-09 23:33:25 +00:00
div.ll	[ARM] Add support for armv7ve triple in llvm (PR31358).	2017-02-09 23:29:14 +00:00
divmod-eabi.ll	ARM: use divmod libcalls on embedded MachO platforms too.	2017-05-08 20:00:14 +00:00
divmod-hwdiv.ll	[ARM] Check for correct HW div when lowering divmod	2017-04-18 08:32:27 +00:00
divmod.ll	ARM: use divmod libcalls on embedded MachO platforms too.	2017-05-08 20:00:14 +00:00
domain-conv-vmovs.ll	…
dwarf-eh.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
dwarf-unwind.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
dyn-stackalloc.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
early-cfi-sections.ll	Emit .cfi_sections before the first .cfi_startproc	2017-01-02 18:05:27 +00:00
eh-dispcont.ll	[ARM] Fix registers clobbered by SjLj EH on soft-float targets	2016-10-11 10:06:59 +00:00
eh-resume-darwin.ll	ARMv7k: base ABI decision on v7k Arch rather than watchos OS.	2016-01-27 19:32:29 +00:00
ehabi-filters.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
ehabi-handlerdata-nounwind.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
ehabi-handlerdata.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
ehabi-no-landingpad.ll	…
ehabi-unwind.ll	…
ehabi.ll	Add support for musl-libc on ARM Linux.	2016-06-24 21:14:33 +00:00
elf-lcomm-align.ll	…
emit-big-cst.ll	…
emutls.ll	Don't print (PLT) on arm.	2016-06-16 16:09:53 +00:00
emutls1.ll	Implement target independent TLS compatible with glibc's emutls.c.	2015-07-28 16:24:05 +00:00
emutls_generic.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
execute-only-big-stack-frame.ll	RegScavenging: Add scavengeRegisterBackwards()	2017-06-17 02:08:18 +00:00
execute-only-section.ll	[ARM] Implement execute-only support in CodeGen	2016-12-15 07:59:08 +00:00
execute-only.ll	[ARM] Implement execute-only support in CodeGen	2016-12-15 07:59:08 +00:00
extload-knownzero.ll	…
extloadi1.ll	…
fabs-neon.ll	…
fabs-to-bfc.ll	Guard fabs to bfc convert with V6T2 flag	2016-01-13 00:03:35 +00:00
fabss.ll	…
fadds.ll	…
fast-isel-GEP-coalesce.ll	…
fast-isel-align.ll	[ARM] Use VCMP, not VCMPE, for floating point equality comparisons	2017-02-13 12:32:47 +00:00
fast-isel-binary.ll	…
fast-isel-br-const.ll	…
fast-isel-br-phi.ll	…
fast-isel-call-multi-reg-return.ll	…
fast-isel-call.ll	Revert "Revert "Map DynamicNoPIC to Static on non-darwin.""	2016-05-28 04:47:13 +00:00
fast-isel-cmp-imm.ll	[ARM] Use VCMP, not VCMPE, for floating point equality comparisons	2017-02-13 12:32:47 +00:00
fast-isel-conversion.ll	…
fast-isel-crash.ll	…
fast-isel-crash2.ll	…
fast-isel-deadcode.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
fast-isel-ext.ll	Limit the range of processors supported by ARM fast isel to v6 or	2015-09-18 20:08:18 +00:00
fast-isel-fold.ll	…
fast-isel-frameaddr.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
fast-isel-icmp.ll	…
fast-isel-indirectbr.ll	…
fast-isel-inline-asm.ll	…
fast-isel-intrinsic.ll	Revert "Revert "Map DynamicNoPIC to Static on non-darwin.""	2016-05-28 04:47:13 +00:00
fast-isel-ldr-str-arm.ll	…
fast-isel-ldr-str-thumb-neg-index.ll	…
fast-isel-ldrh-strh-arm.ll	…
fast-isel-load-store-verify.ll	…
fast-isel-mvn.ll	[ARM] Define a subtarget feature that is used to avoid using movt/movw	2015-07-16 00:58:23 +00:00
fast-isel-pic.ll	Fix tests.	2015-10-26 20:49:49 +00:00
fast-isel-pie.ll	Use shouldAssumeDSOLocal.	2016-06-20 17:45:33 +00:00
fast-isel-pred.ll	…
fast-isel-redefinition.ll	…
fast-isel-remat-same-constant.ll	[Fast-ISel] Don't mark the first use of a remat constant as killed.	2015-05-09 00:51:03 +00:00
fast-isel-ret.ll	…
fast-isel-select.ll	[ARM][FastISel] Use TST #1 instead of CMP #0 for select.	2015-05-06 04:14:02 +00:00
fast-isel-shift-materialize.ll	Fix incorrect kill flags in fastisel.	2015-05-06 22:09:29 +00:00
fast-isel-shifter.ll	…
fast-isel-static.ll	[ARM] Define a subtarget feature and use it to decide whether long calls should	2015-07-07 06:54:42 +00:00
fast-isel-update-valuemap-for-extract.ll	[Fast-ISel] Clear kill flags on registers replaced by updateValueMap.	2015-05-08 20:46:54 +00:00
fast-isel-vaddd.ll	[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.	2015-05-06 16:39:17 +00:00
fast-isel-vararg.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
fast-isel.ll	Revert "Revert "Map DynamicNoPIC to Static on non-darwin.""	2016-05-28 04:47:13 +00:00
fast-tail-call.ll	[ARM] Add B.W and CBZ instructions to ARMv8-M Baseline	2016-01-15 10:26:17 +00:00
fastcc-vfp.ll	…
fastisel-gep-promote-before-add.ll	…
fastisel-thumb-litpool.ll	AsmPrinter: mark the beginning and the end of a function in verbose mode	2017-05-23 21:22:16 +00:00
fcopysign.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
fdivs.ll	…
fence-singlethread.ll	ARM: lower "fence singlethread" to a pure compiler barrier.	2017-04-20 21:56:52 +00:00
fixunsdfdi.ll	…
flag-crash.ll	…
floorf.ll	…
fmacs.ll	…
fmdrr-fmrrd.ll	…
fmscs.ll	…
fmuls.ll	…
fnattr-trap.ll	llvm/test/CodeGen/ARM/fnattr-trap.ll: Add -mtriple, to appease targeting *-win32.	2015-07-03 08:21:38 +00:00
fnegs.ll	…
fnmacs.ll	…
fnmscs.ll	…
fnmul.ll	…
fnmuls.ll	…
fold-const.ll	…
fold-stack-adjust.ll	Codegen: Make chains from trellis-shaped CFGs	2017-02-15 19:49:14 +00:00
formal.ll	…
fp-arg-shuffle.ll	…
fp-fast.ll	…
fp-only-sp.ll	ARM: make sure FastISel bails on f64 operations for Cortex-M4.	2017-02-23 22:35:00 +00:00
fp.ll	…
fp16-args.ll	Do not ASSERTZEXT for i16 result of bitcast from f16 operand	2016-01-08 17:46:05 +00:00
fp16-promote.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
fp16-v3.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
fp16.ll	Add support for musl-libc on ARM Linux.	2016-06-24 21:14:33 +00:00
fp_convert.ll	…
fparith.ll	[ARM] Fix up buildbots after r246360	2015-08-29 11:50:08 +00:00
fpcmp-f64-neon-opt.ll	…
fpcmp-opt.ll	[ARM] Prefer BIC over BFC in ARM mode.	2017-04-07 22:01:23 +00:00
fpcmp.ll	[ARM] Use VCMP, not VCMPE, for floating point equality comparisons	2017-02-13 12:32:47 +00:00
fpcmp_ueq.ll	[ARM] Use VCMP, not VCMPE, for floating point equality comparisons	2017-02-13 12:32:47 +00:00
fpconsts.ll	…
fpconv.ll	…
fpmem.ll	…
fpoffset_overflow.mir	RegScavenging: Add scavengeRegisterBackwards()	2017-06-17 02:08:18 +00:00
fpow.ll	…
fpowi.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
fpscr-intrinsics.ll	[ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each other""	2017-03-07 11:17:53 +00:00
fptoint.ll	…
frame-register.ll	…
fsubs.ll	…
func-argpassing-endian.ll	…
fusedMAC.ll	…
gep-optimization.ll	[DAGCombiner] Fold together mul and shl when both are by a constant	2015-08-21 10:48:17 +00:00
ghc-tcreturn-lowered.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
global-merge-1.ll	Revert "Use private linkage for MergedGlobals variables" on Darwin.	2016-11-11 17:50:09 +00:00
global-merge-addrspace.ll	Changed renaming of local symbols by inserting a dot vefore the numeric suffix.	2015-05-12 16:47:30 +00:00
global-merge-external.ll	[GlobalMerge] Don't merge globals that may be preempted	2017-06-02 10:24:14 +00:00
global-merge.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
globals.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
gpr-paired-spill-thumbinst.ll	…
gpr-paired-spill.ll	In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.	2017-03-14 00:34:14 +00:00
gv-stubs-crash.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
half.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
hardfloat_neon.ll	…
hello.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
hfa-in-contiguous-registers.ll	…
hidden-vis-2.ll	…
hidden-vis-3.ll	…
hidden-vis.ll	…
hints.ll	…
iabs.ll	…
ifconv-kills.ll	…
ifconv-regmask.ll	…
ifcvt-branch-weight-bug.ll	Fix buildbot failure after rL303327: [BPI] Reduce the probability of unreachable edge to minimal value greater than 0.	2017-05-18 07:20:52 +00:00
ifcvt-branch-weight.ll	Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces.	2015-12-01 05:29:22 +00:00
ifcvt-callback.ll	[ARM] Pass a callback to FunctionPass constructors to enable skipping execution	2015-06-08 18:50:43 +00:00
ifcvt-dead-def.ll	Handle dead defs in the if converter.	2015-05-06 22:51:04 +00:00
ifcvt-iter-indbr.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
ifcvt-regmask-noreturn.ll	Fix IfConverter to handle regmask machine operands.	2015-05-05 22:09:41 +00:00
ifcvt1.ll	…
ifcvt2.ll	…
ifcvt3.ll	Re-commit r235560: Switch lowering: extract jump tables and bit tests before building binary tree (PR22262)	2015-04-23 16:45:24 +00:00
ifcvt4.ll	Codegen: Tail Merge: Be less aggressive with special cases.	2016-08-10 18:36:18 +00:00
ifcvt5.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
ifcvt6.ll	[ARM] Enable shrink-wrapping by default.	2015-11-18 00:40:54 +00:00
ifcvt7.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
ifcvt8.ll	[ARM] Enable shrink-wrapping by default.	2015-11-18 00:40:54 +00:00
ifcvt9.ll	…
ifcvt10.ll	In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.	2017-03-14 00:34:14 +00:00
ifcvt11.ll	…
ifcvt12.ll	…
illegal-bitfield-loadstore.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
illegal-vector-bitcast.ll	…
imm-peephole-arm.mir	Move .mir tests to appropriate directories	2016-12-09 19:08:15 +00:00
imm-peephole-thumb.mir	Move .mir tests to appropriate directories	2016-12-09 19:08:15 +00:00
imm.ll	…
immcost.ll	[ARM] ADD with a negative offset can become SUB for free	2016-09-09 13:35:36 +00:00
indirect-hidden.ll	…
indirect-reg-input.ll	…
indirectbr-2.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
indirectbr-3.ll	Test: Add REQUIRES: asserts to test that now requires stats.	2016-08-25 00:06:52 +00:00
indirectbr.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
inline-diagnostics.ll	…
inlineasm-64bit.ll	…
inlineasm-X-allocation.ll	[ARM] Add support for the X asm constraint	2016-04-25 14:29:18 +00:00
inlineasm-X-constraint.ll	Pass the test file in through stdin instead of by filename.	2016-04-26 03:43:49 +00:00
inlineasm-global.ll	…
inlineasm-imm-arm.ll	…
inlineasm-imm-thumb.ll	Add some testing for thumb1 and thumb2 inline asm immediate constraints	2016-01-08 00:34:44 +00:00
inlineasm-imm-thumb2.ll	Add some testing for thumb1 and thumb2 inline asm immediate constraints	2016-01-08 00:34:44 +00:00
inlineasm-ldr-pseudo.ll	[ARM] Fixup tests to take into account mov translation. NFC.	2016-05-12 21:22:37 +00:00
inlineasm-switch-mode-oneway-from-arm.ll	…
inlineasm-switch-mode-oneway-from-thumb.ll	Revert r265817	2016-04-08 18:15:37 +00:00
inlineasm-switch-mode.ll	Revert r265817	2016-04-08 18:15:37 +00:00
inlineasm.ll	…
inlineasm2.ll	…
inlineasm3.ll	[ARM] Skip inline asm memory operands in DAGToDAGISel	2016-07-20 09:48:24 +00:00
inlineasm4.ll	…
insn-sched1.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
int-to-fp.ll	…
integer_insertelement.ll	…
interrupt-attr.ll	ARM: use r7 as the frame-pointer on all MachO targets.	2016-04-11 22:27:40 +00:00
interval-update-remat.ll	Add address space mangling to lifetime intrinsics	2017-04-10 20:18:21 +00:00
interwork.ll	[ARM] Add ".code 32" to functions in the ARM instruction set	2016-09-13 12:18:15 +00:00
intrinsics-coprocessor.ll	[ARM] Avoid using ARM instructions in Thumb mode	2017-01-31 14:35:01 +00:00
intrinsics-crypto.ll	…
intrinsics-memory-barrier.ll	…
intrinsics-overflow.ll	…
intrinsics-v8.ll	…
invalid-target.ll	…
invalidated-save-point.ll	[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.	2017-06-06 08:16:19 +00:00
invoke-donothing-assert.ll	Move the personality function from LandingPadInst to Function	2015-06-17 20:52:32 +00:00
isel-v8i32-crash.ll	…
ispositive.ll	…
jump-table-islands-split.ll	ARM: recommit r237590: allow jump tables to be placed as constant islands.	2015-05-31 19:22:07 +00:00
jump-table-islands.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
jump-table-tbh.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
jumptable-label.ll	ARM: recommit r237590: allow jump tables to be placed as constant islands.	2015-05-31 19:22:07 +00:00
krait-cpu-div-attribute.ll	…
large-stack.ll	…
ldaex-stlex.ll	…
ldc2l.ll	[ARM] Add backend support for load/store intrinsics.	2016-05-31 12:39:30 +00:00
ldm-base-writeback.ll	[ARM] Transform LDMs into writeback form to save code size	2016-06-07 11:47:24 +00:00
ldm-stm-base-materialization.ll	[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.	2015-10-05 14:49:54 +00:00
ldm-stm-i256.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
ldm.ll	…
ldr.ll	…
ldr_ext.ll	…
ldr_frame.ll	Fix some erroneous lit test failures due to unlucky name of working directory.	2016-02-17 16:35:18 +00:00
ldr_post.ll	…
ldr_pre.ll	…
ldrd-memoper.ll	…
ldrd.ll	Add address space mangling to lifetime intrinsics	2017-04-10 20:18:21 +00:00
ldst-f32-2-i32.ll	…
ldstrex-m.ll	[ARM] Add ARMv8-A semaphore/atomic instructions to ARMv8-M Baseline/Mainline	2016-01-15 10:26:51 +00:00
ldstrex.ll	…
legalize-unaligned-load.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
lit.local.cfg	…
litpool-licm.ll	ARM: don't attempt to merge litpools referencing different PC-anchors.	2016-05-05 18:38:53 +00:00
load-address-masked.ll	…
load-arm.ll	ARM: add extra test for addrmode folding.	2017-05-03 16:54:30 +00:00
load-combine-big-endian.ll	[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine	2017-03-01 18:12:29 +00:00
load-combine.ll	[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine	2017-03-01 18:12:29 +00:00
load-global.ll	ARM/ELF: Better codegen for global variable addresses.	2015-10-26 18:23:16 +00:00
load-store-flags.ll	[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.	2015-10-05 14:49:54 +00:00
load.ll	[ARM] Reorganise and simplify thumb-1 load/store selection	2015-08-13 10:48:22 +00:00
load_i1_select.ll	…
load_store_multiple.ll	[ARM] Fix invalid VLDM/VSTM access when targeting Big Endian with NEON	2016-10-10 16:01:54 +00:00
local-call.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
log2_not_readnone.ll	…
long-setcc.ll	…
long.ll	…
longMAC.ll	[ARM] Fix mixup between Lo and Hi in SMLALBB formation.	2017-03-25 00:13:24 +00:00
long_shift.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
lowerMUL-newload.ll	[SelectionDAG] [ARM CodeGen] Fix chain information of LowerMUL	2017-04-06 20:22:51 +00:00
lsr-code-insertion.ll	ARM: override cost function to re-enable ConstantHoisting (& fix it).	2016-04-13 23:08:27 +00:00
lsr-icmp-imm.ll	[Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0)	2016-09-09 12:52:24 +00:00
lsr-scale-addr-mode.ll	[ARM] Assign cost of scaling for Cortex-R52	2016-10-18 09:08:54 +00:00
lsr-unfolded-offset.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
machine-copyprop.mir	MachineCopyPropagation: Respect implicit operands of COPY	2017-02-04 02:27:20 +00:00
machine-cse-cmp.ll	Revert "CodeGen: Allow small copyable blocks to "break" the CFG."	2017-01-11 19:55:19 +00:00
machine-licm.ll	…
macho-extern-hidden.ll	Use isTargetMachO instead of isTargetDarwin.	2016-08-24 19:02:29 +00:00
macho-frame-offset.ll	ARM: use callee-saved list in the order they're actually saved.	2016-05-13 19:16:14 +00:00
mature-mc-support.ll	[LLC] Add an inline assembly diagnostics handler.	2017-02-03 11:14:39 +00:00
mem.ll	…
memcpy-inline.ll	[ARM] Fix lowering of misaligned memcpy/memset	2017-05-26 13:59:12 +00:00
memcpy-ldm-stm.ll	[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.	2015-10-05 14:49:54 +00:00
memcpy-no-inline.ll	Code size optimisation: do not inline memcpy if this expansion results	2016-06-03 15:38:55 +00:00
memfunc.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
memset-inline.ll	[ARM] Fix lowering of misaligned memcpy/memset	2017-05-26 13:59:12 +00:00
metadata-default.ll	…
metadata-short-enums.ll	…
metadata-short-wchar.ll	…
minmax.ll	[ARM] Add instruction selection patterns for vmin/vmax	2015-08-19 14:11:27 +00:00
minsize-call-cse.ll	[ARM] Prefer indirect calls in minsize mode	2016-07-15 07:55:21 +00:00
minsize-imms.ll	…
minsize-litpools.ll	…
misched-copy-arm.ll	CodeGen: Rename DEBUG_TYPE to match passnames	2017-05-25 21:26:32 +00:00
misched-fp-basic.ll	CodeGen: Rename DEBUG_TYPE to match passnames	2017-05-25 21:26:32 +00:00
misched-fusion-aes.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
misched-int-basic-thumb2.mir	CodeGen: Rename DEBUG_TYPE to match passnames	2017-05-25 21:26:32 +00:00
misched-int-basic.mir	CodeGen: Rename DEBUG_TYPE to match passnames	2017-05-25 21:26:32 +00:00
mls.ll	…
movcc-double.ll	…
movt-movw-global.ll	…
movt.ll	[ARM] Enable Cortex-M23 and Cortex-M33 support.	2017-02-01 11:55:03 +00:00
msr-it-block.ll	[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic	2017-02-10 17:41:08 +00:00
mul.ll	…
mul_const.ll	…
mulhi.ll	…
mult-alt-generic-arm.ll	…
mvn.ll	…
named-reg-alloc.ll	Re-commit of r238201 with fix for building with shared libraries.	2015-06-01 12:02:47 +00:00
named-reg-notareg.ll	Re-commit of r238201 with fix for building with shared libraries.	2015-06-01 12:02:47 +00:00
negate-i1.ll	[DAG] optimize negation of bool	2016-10-19 16:58:59 +00:00
negative-offset.ll	…
neon-fma.ll	…
neon-spfp.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
neon-v8.1a.ll	[ARM] Add v8.1a "Rounding Double Multiply Add/Subtract" extension	2015-03-26 18:29:02 +00:00
neon_arith1.ll	…
neon_cmp.ll	…
neon_div.ll	ARM: fix vectorized division on WoA	2017-01-27 03:41:53 +00:00
neon_fpconv.ll	…
neon_ld1.ll	…
neon_ld2.ll	…
neon_minmax.ll	[ARM] Fix crash when targetting CPU without NEON	2015-08-17 19:37:12 +00:00
neon_shift.ll	…
neon_spill.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
neon_vabs.ll	Do full codegen for various tests. NFC	2017-02-27 01:15:57 +00:00
neon_vshl_minint.ll	When lowering vector shifts a check is performed to see if the value to shift by	2015-07-24 09:31:48 +00:00
nest-register.ll	[ARM] Add support for nest attribute using r12	2015-07-12 18:16:40 +00:00
no-cfi.ll	Emit .cfi_sections before the first .cfi_startproc	2017-01-02 18:05:27 +00:00
no-cmov2bfi.ll	[ARM] Fix computeKnownBits for ARMISD::CMOV	2017-03-23 16:47:47 +00:00
no-fpu.ll	…
no-tail-call.ll	…
no_redundant_trunc_for_cmp.ll	DAG: avoid duplicated truncating for sign extended operand	2016-07-29 23:33:48 +00:00
none-macho-v4t.ll	…
none-macho.ll	ARM: use r7 as the frame-pointer on all MachO targets.	2016-04-11 22:27:40 +00:00
noopt-dmb-v7.ll	[Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.	2015-05-20 21:40:38 +00:00
nop_concat_vectors.ll	…
noreturn.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
null-streamer.ll	…
opt-shuff-tstore.ll	…
optimize-dmbs-v7.ll	[Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.	2015-05-20 21:40:38 +00:00
optselect-regclass.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
out-of-registers.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
pack.ll	…
peephole-bitcast.ll	…
phi.ll	Turn on -addr-sink-using-gep by default.	2017-04-06 22:42:18 +00:00
pic.ll	Don't print (PLT) on arm.	2016-06-16 16:09:53 +00:00
pie.ll	Add a use of shouldAssumeDSOLocal to ARM.	2016-05-31 15:31:55 +00:00
plt-relative-reloc.ll	CodeGen: Use PLT relocations for relative references to unnamed_addr functions.	2016-04-22 20:40:10 +00:00
popcnt.ll	[ARM] Expand v1i64 and v2i64 ctpop.	2016-03-31 19:42:04 +00:00
pr3502.ll	…
pr13249.ll	…
pr18364-movw.ll	…
pr25317.ll	[ARM] Handle the inline asm constraint type 'o'	2015-10-26 10:04:52 +00:00
pr25838.ll	Fix PR25838.	2015-12-17 01:29:08 +00:00
pr26669.ll	[SjLjEHPrepare] Don't grab pointers to functions in doInitialization	2016-02-19 03:13:40 +00:00
pr32545.ll	[SDAG] Fix visitAND optimization to deal with vector extract case again.	2017-04-06 19:05:41 +00:00
preferred-align.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
prefetch.ll	…
prera-ldst-aliasing.mir	[ARM] Use alias analysis in ARMPreAllocLoadStoreOpt.	2017-03-17 00:34:26 +00:00
prera-ldst-insertpt.mir	[ARM] Fix insert point for store rescheduling.	2017-03-02 21:39:39 +00:00
print-memb-operand.ll	[ARM] Enable changing instprinter's behavior based on the per-function	2015-03-27 23:41:42 +00:00
private.ll	…
rbit.ll	[SelectionDAG] Add support for BITREVERSE constant folding	2017-01-16 13:39:00 +00:00
readcyclecounter.ll	…
reg_sequence.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
regpair_hint_phys.ll	ARM: Handle physreg targets in RegPair hints gracefully	2015-04-03 00:18:38 +00:00
rem_crash.ll	llvm/test/CodeGen/ARM/rem_crash.ll: Avoid unsupported targets to specify explicit triple.	2016-03-03 22:38:39 +00:00
ret0.ll	…
ret_arg1.ll	…
ret_arg2.ll	…
ret_arg3.ll	…
ret_arg4.ll	…
ret_arg5.ll	…
ret_f32_arg2.ll	…
ret_f32_arg5.ll	…
ret_f64_arg2.ll	…
ret_f64_arg_reg_split.ll	…
ret_f64_arg_split.ll	…
ret_f64_arg_stack.ll	…
ret_i64_arg2.ll	…
ret_i64_arg3.ll	…
ret_i64_arg_split.ll	…
ret_i128_arg2.ll	…
ret_sret_vector.ll	…
ret_void.ll	…
returned-ext.ll	Revert "Disable this-return argument forwarding on ARM/AArch64"	2016-07-20 04:13:01 +00:00
returned-trunc-tail-calls.ll	…
rev.ll	The automatic CHECK: to CHECK-LABEL: conversion, back in 2013,	2017-02-25 15:17:16 +00:00
rotate.ll	[ARM] Expand ROTL and ROTR of vector value types	2015-10-27 10:25:20 +00:00
saxpy10-a9.ll	Complete the MachineScheduler fix made way back in r210390.	2015-03-27 06:10:13 +00:00
sbfx.ll	…
sched-it-debug-nodes.mir	Move test to correct directory	2016-12-17 02:16:26 +00:00
section-name.ll	…
section.ll	…
segmented-stacks-dynamic.ll	…
segmented-stacks.ll	…
select-imm.ll	…
select-undef.ll	…
select.ll	…
select_const.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
select_xform.ll	[DAGCombiner] fold binops with constant into select-of-constants	2017-03-01 22:51:31 +00:00
setcc-logic.ll	[DAGCombiner] add and use TLI hook to convert and-of-seteq / or-of-setne to bitwise logic+setcc (PR32401)	2017-04-05 14:09:39 +00:00
setcc-type-mismatch.ll	…
setjmp_longjmp.ll	Fix __builtin_setjmp in combination with sjlj exception handling.	2015-07-16 22:34:16 +00:00
shift-combine.ll	Make the canonicalisation on shifts benifit to more case.	2016-12-23 02:56:07 +00:00
shift-i64.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
shifter_operand.ll	ARM: don't mangle DAG constant if it has more than one use	2016-01-29 19:18:46 +00:00
shuffle.ll	…
sincos.ll	[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno	2017-06-12 17:15:41 +00:00
single-issue-r52.mir	CodeGen: Rename DEBUG_TYPE to match passnames	2017-05-25 21:26:32 +00:00
sjlj-prepare-critical-edge.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
sjljeh-swifterror.ll	SjLjEHPrepare: Fix the pass for swifterror arguments	2017-03-07 20:29:02 +00:00
sjljehprepare-lower-empty-struct.ll	ARMv7k: base ABI decision on v7k Arch rather than watchos OS.	2016-01-27 19:32:29 +00:00
smml.ll	In Thumb1, materialize a move between low registers as a `movs`, if CPSR isn't live.	2017-03-07 09:38:16 +00:00
smul.ll	[ARM] Move SMULW[B|T] isel to DAG Combine	2017-03-14 09:13:22 +00:00
softfp-fabs-fneg.ll	[ARM] Prefer BIC over BFC in ARM mode.	2017-04-07 22:01:23 +00:00
space-directive.ll	…
special-reg-acore.ll	Re-commit of r238201 with fix for building with shared libraries.	2015-06-01 12:02:47 +00:00
special-reg-mcore.ll	[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic	2017-02-10 17:41:08 +00:00
special-reg-v8m-base.ll	[ARM] Add new system registers to ARMv8-M Baseline/Mainline	2016-01-25 11:25:36 +00:00
special-reg-v8m-main.ll	[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic	2017-02-10 17:41:08 +00:00
special-reg.ll	Re-commit of r238201 with fix for building with shared libraries.	2015-06-01 12:02:47 +00:00
spill-q.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
ssat-lower.ll	Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2	2015-12-20 06:41:44 +00:00
ssat-upper.ll	Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2	2015-12-20 06:41:44 +00:00
ssat-v4t.ll	[ARM] Saturation instructions are DSP-only	2016-07-25 22:25:25 +00:00
ssat.ll	[ARM] Saturation instructions are DSP-only	2016-07-25 22:25:25 +00:00
ssp-data-layout.ll	[ARM] Fix offset calculation in ARMBaseRegisterInfo::needsFrameBaseReg	2015-03-17 18:20:47 +00:00
stack-alignment.ll	…
stack-frame.ll	…
stack-protector-bmovpcb_call.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
stack_guard_remat.ll	Add address space mangling to lifetime intrinsics	2017-04-10 20:18:21 +00:00
stackpointer.ll	…
static-addr-hoisting.ll	In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.	2017-03-14 00:34:14 +00:00
stc2.ll	[ARM] Add backend support for load/store intrinsics.	2016-05-31 12:39:30 +00:00
stm.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
str_post.ll	…
str_pre-2.ll	…
str_pre.ll	…
str_trunc.ll	…
struct-byval-frame-index.ll	Revert "Change memcpy/memset/memmove to have dest and source alignments."	2015-11-19 05:56:52 +00:00
struct_byval.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
struct_byval_arm_t1_t2.ll	[Thumb] Emit Thumb move in both Thumb modes for struct_byval predicates	2016-07-29 09:16:46 +00:00
sub-cmp-peephole.ll	…
sub.ll	…
subreg-remat.ll	…
subtarget-features-long-calls.ll	Fix test case to unbreak build.	2015-07-07 14:45:12 +00:00
subtarget-no-movt.ll	[ARM] Constant Materialize: imms with specific value can be encoded into mov.w	2016-08-05 20:58:29 +00:00
swift-atomics.ll	…
swift-ios.ll	Swift Calling Convention: swiftcc for ARM.	2016-04-05 22:44:44 +00:00
swift-return.ll	More swift calling convention tests	2016-10-28 17:21:05 +00:00
swift-vldm.ll	ARM: Introduce conservative load/store optimization mode	2016-03-02 19:20:00 +00:00
swifterror.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
swiftself.ll	[ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns'	2017-02-08 22:30:47 +00:00
switch-minsize.ll	[SDAGBuilder] Don't create a binary tree for switches in minsize mode	2016-09-08 13:12:22 +00:00
sxt_rot.ll	[ARM] Improve sxta{b|h} and uxta{b|h} tests	2016-08-10 09:34:34 +00:00
t2-imm.ll	…
t2-shrink-ldrpost.ll	[ARM] Shrink post-indexed LDR and STR to LDM/STM	2016-06-07 12:13:34 +00:00
t2abs-killflags.ll	Don't always apply kill flag in thumb2 ABS pseudo expansion.	2015-04-30 22:15:59 +00:00
tail-call-builtin.ll	Revert "CodeGen: ensure that libcalls are always AAPCS CC"	2016-09-07 03:17:19 +00:00
tail-call-float.ll	[ARM] Relax restriction on variadic functions for tailcall optimization	2016-11-17 10:56:58 +00:00
tail-call-weak.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
tail-call.ll	[ARM] Relax restriction on variadic functions for tailcall optimization	2016-11-17 10:56:58 +00:00
tail-dup-kill-flags.ll	Clear kill flags in tail duplication.	2015-05-07 21:48:26 +00:00
tail-dup.ll	…
tail-merge-branch-weight.ll	Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces.	2015-12-01 05:29:22 +00:00
tail-opts.ll	[BranchFolding] Tail common all identical unreachable blocks	2017-02-14 21:02:24 +00:00
taildup-branch-weight.ll	Improve the successor list update in TailDuplication.cpp.	2015-12-15 10:10:40 +00:00
test-sharedidx.ll	Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.	2015-09-18 18:19:40 +00:00
this-return.ll	Revert "Disable this-return argument forwarding on ARM/AArch64"	2016-07-20 04:13:01 +00:00
thread_pointer.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
thumb-alignment.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
thumb-big-stack.ll	[ARM][TEST] Strengthen test against smarter reg alloc.	2015-05-01 00:45:55 +00:00
thumb-litpool.ll	…
thumb-stub.ll	Avoid a load for local functions.	2016-06-01 21:57:11 +00:00
thumb1-div.ll	[ARM] Add a div regression test for Cortex-M23	2017-02-20 12:05:07 +00:00
thumb1-ldst-opt.ll	[MIR] Print on the given output instead of stderr.	2016-07-13 20:36:03 +00:00
thumb1-varalloc.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
thumb1_return_sequence.ll	[ARM] For old thumb ISA like v4t, we cannot use PC directly in pop.	2015-11-30 20:37:58 +00:00
thumb2-it-block.ll	Be less conservative about forming IT blocks.	2015-08-03 09:24:48 +00:00
thumb2-size-opt.ll	ARM: check alignment before transforming ldr -> ldm (or similar).	2016-09-19 09:11:09 +00:00
thumb2-size-reduction-internal-flags.ll	Commute the internal flag on MachineOperands.	2015-04-30 23:14:14 +00:00
thumb_indirect_calls.ll	Fix CHECK directives that weren't checking.	2015-08-31 21:10:35 +00:00
tls-models.ll	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
tls1.ll	…
tls2.ll	…
tls3.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
trap.ll	[ARM] Emit trap instruction using .inst directive	2016-01-29 10:23:32 +00:00
trunc_ldr.ll	…
truncstore-dag-combine.ll	Fix some erroneous lit test failures due to unlucky name of working directory.	2016-02-17 16:35:18 +00:00
tst_teq.ll	…
twoaddrinstr.ll	ExpandPostRAPseudos should transfer implicit uses, not only implicit defs	2016-07-15 22:31:14 +00:00
uint64tof64.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
umulo-32.ll	…
unaligned_load_store.ll	[ARM] Define subtarget feature strict-align.	2015-07-28 22:44:28 +00:00
unaligned_load_store_vector.ll	…
unaligned_load_store_vfp.ll	ARM: make sure VFP loads and stores are properly aligned.	2015-10-26 21:32:53 +00:00
undef-sext.ll	…
undefined.ll	…
unord.ll	…
unsafe-fsub.ll	…
unschedule-first-call.ll	[SelectionDAG] Check CALLSEQ_BEGIN nodes in DelayForLiveRegs	2017-04-11 08:43:32 +00:00
unwind-init.ll	…
urem-opt-size.ll	[ARM] Code size optimisation to lower udiv+urem to udiv+mls instead of a	2016-10-03 10:12:32 +00:00
usat-lower.ll	Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2	2015-12-20 06:41:44 +00:00
usat-upper.ll	Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2	2015-12-20 06:41:44 +00:00
usat-v4t.ll	[ARM] Saturation instructions are DSP-only	2016-07-25 22:25:25 +00:00
uxt_rot.ll	[ARM] Improve sxta{b|h} and uxta{b|h} tests	2016-08-10 09:34:34 +00:00
uxtb.ll	test: modernise ARM CodeGen tests	2016-12-27 18:35:19 +00:00
v1-constant-fold.ll	…
v6-jumptable-clobber.mir	MIR: remove explicit "noVRegs" property.	2017-05-30 21:28:57 +00:00
v6m-smul-with-overflow.ll	Fix signed multiplication with overflow fallback.	2017-04-26 13:41:43 +00:00
v6m-umul-with-overflow.ll	DAG: correctly legalize UMULO.	2017-06-20 15:01:38 +00:00
v7k-abi-align.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
v7k-libcalls.ll	[ARM] Use aapcs_vfp for ___truncdfhf2 on v7k.	2016-06-24 00:08:01 +00:00
v7k-sincos.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
v8m-tail-call.ll	[ARM] Change TCReturn to tBL if tailcall optimization fails.	2017-02-03 11:15:53 +00:00
v8m.base-jumptable_alignment.ll	[CodeGen] fix alignment of JUMPTABLE_INSTS on v8M.base	2017-02-13 14:07:45 +00:00
va_arg.ll	[ARM] Prefer BIC over BFC in ARM mode.	2017-04-07 22:01:23 +00:00
vaba.ll	…
vabd.ll	…
vabs.ll	[ARM][NEON] Add support for ISD::ABS lowering	2017-05-08 10:37:34 +00:00
vadd.ll	…
vararg_no_start.ll	…
varargs-spill-stack-align-nacl.ll	…
vargs.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
vargs_align.ll	…
vbits.ll	[DAG] add splat vector support for 'xor' in SimplifyDemandedBits	2017-04-19 21:23:09 +00:00
vbsl-constant.ll	…
vbsl.ll	…
vceq.ll	…
vcge.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
vcgt.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vcmp-crash.ll	[ARM] Fix crash caused by r294945	2017-02-13 17:18:00 +00:00
vcnt.ll	[ARM] Expand vector ctlz_zero_undef so it becomes ctlz.	2016-04-26 05:04:37 +00:00
vcombine.ll	[DAGCombiner] use narrow load to avoid vector extract	2017-05-27 14:07:03 +00:00
vcvt-cost.ll	…
vcvt-v8.ll	…
vcvt.ll	[SDAG] Move TRUNCATE splitting logic into a helper, and use	2015-03-31 10:20:58 +00:00
vcvt_combine.ll	ARM: stop asserting on weird <3 x Ty> vectors in ISelLowering.	2016-03-17 20:10:28 +00:00
vdiv_combine.ll	ARM: stop asserting on weird <3 x Ty> vectors in ISelLowering.	2016-03-17 20:10:28 +00:00
vdup.ll	DAG: Avoid OOB when legalizing vector indexing	2017-01-10 22:02:30 +00:00
vector-DAGCombine.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vector-extend-narrow.ll	…
vector-load.ll	ARM: handle post-indexed NEON ops where the offset isn't the access width.	2017-04-20 19:54:02 +00:00
vector-promotion.ll	Don't conditionalize Neon instructions, even in IT blocks.	2017-06-22 12:11:38 +00:00
vector-spilling.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
vector-store.ll	ARM: handle post-indexed NEON ops where the offset isn't the access width.	2017-04-20 19:54:02 +00:00
vext.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vfcmp.ll	…
vfloatintrinsics.ll	Fix the Thumb test for vfloat intrinsics	2016-09-12 13:14:14 +00:00
vfp-libcalls.ll	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
vfp-reg-stride.ll	ARM: add support for WatchOS's compact unwind information.	2015-10-28 22:56:36 +00:00
vfp-regs-dwarf.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
vfp.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vget_lane.ll	…
vhadd.ll	…
vhsub.ll	…
vicmp-64.ll	Improve ARM lowering for "icmp <2 x i64> eq".	2016-10-18 21:03:40 +00:00
vicmp.ll	…
vld-vst-upgrade.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
vld1.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vld2.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vld3.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vld4.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vlddup.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vldlane.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vldm-liveness.ll	[ARM] Check correct instructions for load/store rescheduling.	2017-03-01 22:56:20 +00:00
vldm-liveness.mir	[ARM] Check correct instructions for load/store rescheduling.	2017-03-01 22:56:20 +00:00
vldm-sched-a9.ll	…
vminmax.ll	[CodeGen] Teach LLVM how to lower @llvm.{min,max}num to {MIN,MAX}NAN	2016-04-14 07:13:24 +00:00
vminmaxnm-safe.ll	[ARM] Rejig vmax tests a bit	2015-08-13 17:28:16 +00:00
vminmaxnm.ll	Generate FMINNAN/FMINNUM/FMAXNAN/FMAXNUM from SDAGBuilder.	2015-08-17 07:13:10 +00:00
vmla.ll	…
vmls.ll	…
vmov.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
vmul.ll	[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.	2016-12-16 18:44:08 +00:00
vneg.ll	…
vpadal.ll	…
vpadd.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vpminmax.ll	…
vqadd.ll	…
vqdmul.ll	…
vqshl.ll	…
vqshrn.ll	…
vqsub.ll	…
vrec.ll	…
vrev.ll	…
vsel.ll	[ARM] Use VCMP, not VCMPE, for floating point equality comparisons	2017-02-13 12:32:47 +00:00
vselect_imax.ll	[ARM] Don't pessimize i32 vselect.	2015-11-17 17:25:15 +00:00
vshift.ll	…
vshiftins.ll	…
vshl.ll	…
vshll.ll	…
vshrn.ll	…
vsra.ll	…
vst1.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vst2.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
vst3.ll	[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions	2015-09-30 10:56:37 +00:00
vst4.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vstlane.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vsub.ll	…
vtbl.ll	[ARM] Use TableGen patterns to select vtbl. NFC.	2017-04-19 20:39:39 +00:00
vtrn.ll	[ARM] More aggressive matching for vpadd and vpaddl.	2017-01-11 19:33:38 +00:00
vuzp.ll	[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).	2017-06-28 07:07:03 +00:00
vzip.ll	[ARM] Implement isExtractSubvectorCheap.	2016-12-20 20:05:07 +00:00
warn-stack.ll	[ARM] Generate consistent frame records for Thumb2	2016-08-23 09:19:22 +00:00
weak.ll	…
weak2.ll	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
wide-compares.ll	ARM: Better codegen for 64-bit compares.	2016-03-21 18:00:02 +00:00
widen-vmovs.ll	[ARM] Do not test for CPUs, use SubtargetFeatures. Also remove 2 flags.	2016-07-06 11:22:11 +00:00
wrong-t2stmia-size-opt.ll	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	2015-07-21 00:18:59 +00:00
xray-armv6-attribute-instrumentation.ll	[XRay] Reduce synthetic references emitted by XRay	2017-06-21 06:39:42 +00:00
xray-armv7-attribute-instrumentation.ll	[XRay] Reduce synthetic references emitted by XRay	2017-06-21 06:39:42 +00:00
xray-tail-call-sled.ll	[xray] Add XRay support for Mach-O in CodeGen	2016-11-23 02:07:04 +00:00
zero-cycle-zero.ll	[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.	2016-04-19 23:51:52 +00:00
zextload_demandedbits.ll	…