llvm-project/llvm/test/TableGen/Common
Matt Arsenault ee3feef5aa TableGen/GlobalISel: Allow output instructions with multiple defs
The DAG behavior allows matchching input patterns with a single result
to the first result of an output instruction that defines multiple
results. The remaining defs are implicitly dead.

This starts to fix using manual selection for AMDGPU add/sub (although
it's still needed, mostly because it's also still needed for
G_PTR_ADD).
2020-07-27 18:31:13 -04:00
..
GlobalISelEmitterCommon.td TableGen/GlobalISel: Allow output instructions with multiple defs 2020-07-27 18:31:13 -04:00
reg-with-subregs-common.td [TBLGEN] Emit register pressure set enum 2020-02-18 10:09:05 -08:00