forked from OSchip/llvm-project
51 lines
1.7 KiB
LLVM
51 lines
1.7 KiB
LLVM
; RUN: llc -march=amdgcn -mattr=-fp64-fp16-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-fp64-fp16-denormals,-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; GCN-LABEL: {{^}}madak_f16
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; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
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; GCN: buffer_load_ushort v[[B_F16:[0-9]+]]
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; VI: v_madak_f16_e32 v[[R_F16:[0-9]+]], v[[A_F16]], v[[B_F16]], 0x4900{{$}}
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; VI: buffer_store_short v[[R_F16]]
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; GCN: s_endpgm
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define amdgpu_kernel void @madak_f16(
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half addrspace(1)* %r,
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half addrspace(1)* %a,
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half addrspace(1)* %b) {
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entry:
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%a.val = load half, half addrspace(1)* %a
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%b.val = load half, half addrspace(1)* %b
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%t.val = fmul half %a.val, %b.val
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%r.val = fadd half %t.val, 10.0
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store half %r.val, half addrspace(1)* %r
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ret void
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}
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; GCN-LABEL: {{^}}madak_f16_use_2
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; SI: v_mad_f32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; SI: v_mac_f32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; VI: v_mad_f16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; VI: v_mac_f16_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
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; GCN: s_endpgm
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define amdgpu_kernel void @madak_f16_use_2(
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half addrspace(1)* %r0,
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half addrspace(1)* %r1,
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half addrspace(1)* %a,
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half addrspace(1)* %b,
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half addrspace(1)* %c) {
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entry:
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%a.val = load half, half addrspace(1)* %a
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%b.val = load half, half addrspace(1)* %b
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%c.val = load half, half addrspace(1)* %c
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%t0.val = fmul half %a.val, %b.val
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%t1.val = fmul half %a.val, %c.val
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%r0.val = fadd half %t0.val, 10.0
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%r1.val = fadd half %t1.val, 10.0
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store half %r0.val, half addrspace(1)* %r0
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store half %r1.val, half addrspace(1)* %r1
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ret void
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}
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