forked from OSchip/llvm-project
167 lines
8.3 KiB
LLVM
167 lines
8.3 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX89 -check-prefix=VI %s
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; RUN: llc -march=amdgcn -mcpu=gfx901 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX89 -check-prefix=GFX9 %s
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; GCN-LABEL: {{^}}s_cvt_pkrtz_v2f16_f32:
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; GCN-DAG: s_load_dword [[X:s[0-9]+]], s[0:1], 0x{{b|2c}}
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; GCN-DAG: s_load_dword [[SY:s[0-9]+]], s[0:1], 0x{{c|30}}
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; GCN: v_mov_b32_e32 [[VY:v[0-9]+]], [[SY]]
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; SI: v_cvt_pkrtz_f16_f32_e32 v{{[0-9]+}}, [[X]], [[VY]]
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; GFX89: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, [[X]], [[VY]]
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define amdgpu_kernel void @s_cvt_pkrtz_v2f16_f32(<2 x half> addrspace(1)* %out, float %x, float %y) #0 {
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%result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %x, float %y)
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store <2 x half> %result, <2 x half> addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}s_cvt_pkrtz_samereg_v2f16_f32:
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; GCN: s_load_dword [[X:s[0-9]+]]
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; GCN: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, [[X]], [[X]]
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define amdgpu_kernel void @s_cvt_pkrtz_samereg_v2f16_f32(<2 x half> addrspace(1)* %out, float %x) #0 {
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%result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %x, float %x)
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store <2 x half> %result, <2 x half> addrspace(1)* %out
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ret void
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}
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; FIXME: Folds to 0 on gfx9
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; GCN-LABEL: {{^}}s_cvt_pkrtz_undef_undef:
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; GCN-NEXT: ; BB#0
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; SI-NEXT: s_endpgm
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; VI-NEXT: s_endpgm
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; GFX9: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}}
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define amdgpu_kernel void @s_cvt_pkrtz_undef_undef(<2 x half> addrspace(1)* %out) #0 {
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%result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float undef, float undef)
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store <2 x half> %result, <2 x half> addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32:
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; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
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; GCN: {{buffer|flat}}_load_dword [[B:v[0-9]+]]
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; SI: v_cvt_pkrtz_f16_f32_e32 v{{[0-9]+}}, [[A]], [[B]]
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; GFX89: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, [[A]], [[B]]
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define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %a.gep
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%b = load volatile float, float addrspace(1)* %b.gep
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%cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %b)
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store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_reg_imm:
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; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
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; GCN: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, [[A]], 1.0
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define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_reg_imm(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %a.gep
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%cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float 1.0)
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store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_imm_reg:
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; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
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; SI: v_cvt_pkrtz_f16_f32_e32 v{{[0-9]+}}, 1.0, [[A]]
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; GFX89: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, 1.0, [[A]]
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define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_imm_reg(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %a.gep
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%cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float 1.0, float %a)
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store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_fneg_lo:
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; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
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; GCN: {{buffer|flat}}_load_dword [[B:v[0-9]+]]
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; GCN: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, -[[A]], [[B]]
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define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_lo(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %a.gep
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%b = load volatile float, float addrspace(1)* %b.gep
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%neg.a = fsub float -0.0, %a
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%cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.a, float %b)
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store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_fneg_hi:
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; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
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; GCN: {{buffer|flat}}_load_dword [[B:v[0-9]+]]
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; GCN: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, [[A]], -[[B]]
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define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_hi(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %a.gep
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%b = load volatile float, float addrspace(1)* %b.gep
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%neg.b = fsub float -0.0, %b
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%cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %neg.b)
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store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_fneg_lo_hi:
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; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
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; GCN: {{buffer|flat}}_load_dword [[B:v[0-9]+]]
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; GCN: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, -[[A]], -[[B]]
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define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_lo_hi(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %a.gep
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%b = load volatile float, float addrspace(1)* %b.gep
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%neg.a = fsub float -0.0, %a
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%neg.b = fsub float -0.0, %b
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%cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.a, float %neg.b)
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store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
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ret void
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}
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; GCN-LABEL: {{^}}v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi:
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; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]
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; GCN: {{buffer|flat}}_load_dword [[B:v[0-9]+]]
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; GCN: v_cvt_pkrtz_f16_f32_e64 v{{[0-9]+}}, -|[[A]]|, -[[B]]
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define amdgpu_kernel void @v_cvt_pkrtz_v2f16_f32_fneg_fabs_lo_fneg_hi(<2 x half> addrspace(1)* %out, float addrspace(1)* %a.ptr, float addrspace(1)* %b.ptr) #0 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%tid.ext = sext i32 %tid to i64
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%a.gep = getelementptr inbounds float, float addrspace(1)* %a.ptr, i64 %tid.ext
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%b.gep = getelementptr inbounds float, float addrspace(1)* %b.ptr, i64 %tid.ext
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%out.gep = getelementptr inbounds <2 x half>, <2 x half> addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %a.gep
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%b = load volatile float, float addrspace(1)* %b.gep
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%fabs.a = call float @llvm.fabs.f32(float %a)
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%neg.fabs.a = fsub float -0.0, %fabs.a
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%neg.b = fsub float -0.0, %b
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%cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %neg.fabs.a, float %neg.b)
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store <2 x half> %cvt, <2 x half> addrspace(1)* %out.gep
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ret void
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}
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declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #1
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declare float @llvm.fabs.f32(float) #1
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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