forked from OSchip/llvm-project
38 lines
1.8 KiB
LLVM
38 lines
1.8 KiB
LLVM
; RUN: opt %loadPolly -polly-scops -analyze < %s -stats 2>&1 | FileCheck %s --check-prefix=RTA
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; RUN: opt %loadPolly -polly-scops -polly-use-runtime-alias-checks=false -analyze < %s -stats 2>&1 | FileCheck %s --check-prefix=NORTA
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; REQUIRES: asserts
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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define void @f(i32* nocapture %a, i32* nocapture %b) nounwind {
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bb.nph:
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%0 = tail call i32 (...) @rnd() nounwind ; <i32> [#uses=1]
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%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
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%sel.b = getelementptr inbounds i32, i32* %b, i64 4
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%iftmp.0.0 = select i1 %1, i32* %sel.b, i32* %a ; <i32*> [#uses=2]
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br label %bb3
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bb3: ; preds = %bb3, %bb.nph
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%i.06 = phi i64 [ 0, %bb.nph ], [ %tmp, %bb3 ] ; <i64> [#uses=3]
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%scevgep = getelementptr i32, i32* %a, i64 %i.06 ; <i32*> [#uses=1]
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%scevgep7 = getelementptr i32, i32* %iftmp.0.0, i64 %i.06 ; <i32*> [#uses=1]
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%tmp = add i64 %i.06, 1 ; <i64> [#uses=3]
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%scevgep8 = getelementptr i32, i32* %iftmp.0.0, i64 %tmp ; <i32*> [#uses=1]
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%2 = load i32, i32* %scevgep, align 4 ; <i32> [#uses=1]
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%3 = load i32, i32* %scevgep8, align 4 ; <i32> [#uses=1]
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%4 = shl i32 %3, 1 ; <i32> [#uses=1]
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%5 = add nsw i32 %4, %2 ; <i32> [#uses=1]
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store i32 %5, i32* %scevgep7, align 4
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%exitcond = icmp eq i64 %tmp, 64 ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb3
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return: ; preds = %bb3
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ret void
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}
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declare i32 @rnd(...)
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; RTA: 1 polly-detect - Number of scops
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; NORTA: 1 polly-detect - Number of rejected regions: Base address aliasing
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