forked from OSchip/llvm-project
78 lines
1.9 KiB
YAML
78 lines
1.9 KiB
YAML
# RUN: llc -x mir < %s | FileCheck %s
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--- |
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target triple = "x86_64-unknown-linux-gnu"
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@x = external global i64
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@i = external thread_local global i32
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define i32 @or() {
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entry:
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ret i32 undef
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}
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define i32 @and() {
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entry:
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ret i32 undef
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}
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...
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---
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# CHECK-LABEL: or:
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name: or
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alignment: 4
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr64 }
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- { id: 1, class: gr64 }
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- { id: 2, class: gr64 }
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- { id: 3, class: gr64 }
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- { id: 4, class: gr32 }
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body: |
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bb.0.entry:
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%0:gr64 = MOV64rm $rip, 1, $noreg, @x, $noreg :: (load 8)
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%1:gr64 = OR64ri8 %0, 7, implicit-def dead $eflags
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%2:gr64 = MOV64rm $rip, 1, $noreg, target-flags(x86-gottpoff) @i, $noreg :: (load 8)
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%3:gr64 = OR64rr %2, %1, implicit-def dead $eflags
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%4:gr32 = MOV32rm killed %3, 1, $noreg, 0, $fs :: (load 4)
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; CHECK-NOT: orq {{.*}}GOTTPOFF{{.*}}
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;
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; What we actually expect:
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; CHECK: movq {{.*}}GOTTPOFF{{.*}}, %[[R:.*]]
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; CHECK-NEXT: orq %{{.*}}, %[[R]]
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; CHECK-NEXT: movl %fs:(%[[R]]),
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;
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; CHECK-NOT: orq {{.*}}GOTTPOFF{{.*}}
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$eax = COPY %4
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RET 0, $eax
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...
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---
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# CHECK-LABEL: and:
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name: and
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alignment: 4
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr64 }
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- { id: 1, class: gr64 }
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- { id: 2, class: gr64 }
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- { id: 3, class: gr64 }
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- { id: 4, class: gr32 }
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body: |
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bb.0.entry:
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%0:gr64 = MOV64rm $rip, 1, $noreg, @x, $noreg :: (load 8)
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%1:gr64 = OR64ri8 %0, 7, implicit-def dead $eflags
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%2:gr64 = MOV64rm $rip, 1, $noreg, target-flags(x86-gottpoff) @i, $noreg :: (load 8)
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%3:gr64 = AND64rr %2, %1, implicit-def dead $eflags
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%4:gr32 = MOV32rm killed %3, 1, $noreg, 0, $fs :: (load 4)
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; CHECK-NOT: andq {{.*}}GOTTPOFF{{.*}}
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;
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; What we actually expect:
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; CHECK: movq {{.*}}GOTTPOFF{{.*}}, %[[R:.*]]
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; CHECK-NEXT: andq %{{.*}}, %[[R]]
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; CHECK-NEXT: movl %fs:(%[[R]]),
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;
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; CHECK-NOT: andq {{.*}}GOTTPOFF{{.*}}
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$eax = COPY %4
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RET 0, $eax
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...
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