Jakob Stoklund Olesen 7d3c9c0a2a Resolve conflicts involving dead vector lanes for -new-coalescer. ... A common coalescing conflict in vector code is lane insertion: %dst = FOO %src = BAR %dst:ssub0 = COPY %src The live range of %src interferes with the ssub0 lane of %dst, but that lane is never read after %src would have clobbered it. That makes it safe to merge the live ranges and eliminate the COPY: %dst = FOO %dst:ssub0 = BAR This patch teaches the new coalescer to resolve conflicts where dead vector lanes would be clobbered, at least as long as the clobbered vector lanes don't escape the basic block. llvm-svn: 164250		2012-09-19 21:29:18 +00:00
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ARM	Resolve conflicts involving dead vector lanes for -new-coalescer.	2012-09-19 21:29:18 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
CellSPU	Add test triples to fix win32 failures. Revert workaround from r161292.	2012-08-08 20:31:37 +00:00
Generic	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
Hexagon	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
MSP430	Reapply r161633-161634 "Partition use lists so defs always come before uses.""	2012-08-10 00:21:30 +00:00
Mips	Handled unaligned load/stores properly in Mips16	2012-09-15 01:02:03 +00:00
NVPTX	Add llvm.fabs intrinsic.	2012-05-28 21:48:37 +00:00
PowerPC	Really XFAIL test/CodeGen/PowerPC/structsinregs.ll.	2012-09-19 17:03:11 +00:00
SPARC	Move load_to_switch.ll to test/CodeGen/SPARC/	2012-09-19 09:25:03 +00:00
Thumb	Fix Thumb2 fixup kind in the integrated-as.	2012-09-01 15:06:36 +00:00
Thumb2	Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte	2012-09-18 01:42:45 +00:00
X86	Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArith	2012-09-19 19:36:58 +00:00
XCore	Fix pattern for MKMSK instruction.	2012-06-13 17:59:12 +00:00