llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_zext_i32_to_i64
body: |
bb.0.entry:
liveins: $vgpr0
; CHECK-LABEL: name: test_zext_i32_to_i64
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
%0:_(s32) = COPY $vgpr0
%1:_(s64) = G_ZEXT %0
...