forked from OSchip/llvm-project
537 lines
15 KiB
YAML
537 lines
15 KiB
YAML
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the machine memory operands
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# correctly.
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--- |
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define i32 @test(i32* %a) {
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entry:
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%b = load i32, i32* %a
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store i32 42, i32* %a
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ret i32 %b
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}
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define void @test2(i32* %"a value") {
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entry2:
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%b = load i32, i32* %"a value"
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%c = add i32 %b, 1
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store i32 %c, i32* %"a value"
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ret void
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}
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define void @test3(i32*) {
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entry3:
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%1 = alloca i32
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%b = load i32, i32* %0
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%c = add i32 %b, 1
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store i32 %c, i32* %1
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ret void
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}
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define i32 @volatile_inc(i32* %x) {
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entry:
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%0 = load volatile i32, i32* %x
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%1 = add i32 %0, 1
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store volatile i32 %1, i32* %x
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ret i32 %1
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}
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define void @non_temporal_store(i32* %a, i32 %b) {
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entry:
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store i32 %b, i32* %a, align 16, !nontemporal !0
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ret void
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}
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!0 = !{i32 1}
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define i32 @invariant_load(i32* %x) {
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entry:
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%v = load i32, i32* %x, !invariant.load !1
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ret i32 %v
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}
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!1 = !{}
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define void @memory_offset(<8 x float>* %vec) {
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entry:
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%v = load <8 x float>, <8 x float>* %vec
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%v2 = insertelement <8 x float> %v, float 0.0, i32 4
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store <8 x float> %v2, <8 x float>* %vec
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ret void
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}
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define void @memory_alignment(<8 x float>* %vec) {
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entry:
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%v = load <8 x float>, <8 x float>* %vec
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%v2 = insertelement <8 x float> %v, float 0.0, i32 4
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store <8 x float> %v2, <8 x float>* %vec
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ret void
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}
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define double @constant_pool_psv(double %a) {
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entry:
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%b = fadd double %a, 3.250000e+00
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ret double %b
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}
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declare x86_fp80 @cosl(x86_fp80) #0
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define x86_fp80 @stack_psv(x86_fp80 %x) {
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entry:
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%y = call x86_fp80 @cosl(x86_fp80 %x) #0
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ret x86_fp80 %y
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}
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attributes #0 = { readonly }
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@G = external global i32
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define i32 @got_psv() {
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entry:
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%a = load i32, i32* @G
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%b = add i32 %a, 1
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ret i32 %b
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}
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@0 = external global i32
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define i32 @global_value() {
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entry:
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%a = load i32, i32* @G
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%b = add i32 %a, 1
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%c = load i32, i32* @0
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%d = add i32 %b, %c
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ret i32 %d
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}
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define i32 @jumptable_psv(i32 %in) {
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entry:
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switch i32 %in, label %def [
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i32 0, label %lbl1
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i32 1, label %lbl2
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i32 2, label %lbl3
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i32 3, label %lbl4
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]
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def:
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ret i32 0
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lbl1:
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ret i32 1
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lbl2:
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ret i32 2
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lbl3:
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ret i32 4
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lbl4:
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ret i32 8
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}
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%struct.XXH_state64_t = type { i32, i32, i64, i64, i64 }
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@a = common global i32 0, align 4
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define i32 @tbaa_metadata() {
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entry:
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%0 = load i32, i32* @a, align 4, !tbaa !2
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%1 = inttoptr i32 %0 to %struct.XXH_state64_t*
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%total_len2 = bitcast %struct.XXH_state64_t* %1 to i32*
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%2 = load i32, i32* %total_len2, align 4, !tbaa !6
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ret i32 %2
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}
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!2 = !{!3, !3, i64 0}
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!3 = !{!"int", !4, i64 0}
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!4 = !{!"omnipotent char", !5, i64 0}
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!5 = !{!"Simple C/C++ TBAA"}
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!6 = !{!7, !3, i64 0}
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!7 = !{!"XXH_state64_t", !3, i64 0, !3, i64 4, !8, i64 8, !8, i64 16, !8, i64 24}
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!8 = !{!"long long", !4, i64 0}
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define void @aa_scope(float* nocapture %a, float* nocapture readonly %c) #1 {
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entry:
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%0 = load float, float* %c, align 4, !alias.scope !9
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%arrayidx.i = getelementptr inbounds float, float* %a, i64 5
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store float %0, float* %arrayidx.i, align 4, !noalias !9
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%1 = load float, float* %c, align 4
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%arrayidx = getelementptr inbounds float, float* %a, i64 7
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store float %1, float* %arrayidx, align 4
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ret void
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}
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attributes #1 = { nounwind uwtable }
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!9 = distinct !{!9, !10, !"some scope"}
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!10 = distinct !{!10, !"some domain"}
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define zeroext i1 @range_metadata(i8* %x) {
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entry:
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%0 = load i8, i8* %x, align 1, !range !11
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%tobool = trunc i8 %0 to i1
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ret i1 %tobool
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}
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!11 = !{i8 0, i8 2}
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%st = type { i32, i32 }
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@values = common global [50 x %st] zeroinitializer, align 16
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define void @gep_value(i64 %d) {
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entry:
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%conv = trunc i64 %d to i32
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store i32 %conv, i32* getelementptr inbounds ([50 x %st], [50 x %st]* @values, i64 0, i64 0, i32 0), align 16
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ret void
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}
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define i8* @undef_value() {
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entry:
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%0 = load i8*, i8** undef, align 8
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ret i8* %0
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}
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define void @dummy0() { ret void }
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define void @dummy1() { ret void }
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...
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---
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name: test
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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body: |
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bb.0.entry:
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liveins: %rdi
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; CHECK: %eax = MOV32rm %rdi, 1, _, 0, _ :: (load 4 from %ir.a)
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; CHECK-NEXT: MOV32mi killed %rdi, 1, _, 0, _, 42 :: (store 4 into %ir.a)
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%eax = MOV32rm %rdi, 1, _, 0, _ :: (load 4 from %ir.a)
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MOV32mi killed %rdi, 1, _, 0, _, 42 :: (store 4 into %ir.a)
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RETQ %eax
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...
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---
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name: test2
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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body: |
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bb.0.entry2:
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liveins: %rdi
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; CHECK: INC32m killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (store 4 into %ir."a value"), (load 4 from %ir."a value")
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INC32m killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (store 4 into %ir."a value"), (load 4 from %ir."a value")
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RETQ
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...
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---
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name: test3
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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frameInfo:
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maxAlignment: 4
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stack:
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- { id: 0, offset: -12, size: 4, alignment: 4 }
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body: |
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bb.0.entry3:
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liveins: %rdi
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; Verify that the unnamed local values can be serialized.
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; CHECK-LABEL: name: test3
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; CHECK: %eax = MOV32rm killed %rdi, 1, _, 0, _ :: (load 4 from %ir.0)
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; CHECK: MOV32mr %rsp, 1, _, -4, _, killed %eax :: (store 4 into %ir.1)
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%eax = MOV32rm killed %rdi, 1, _, 0, _ :: (load 4 from %ir.0)
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%eax = INC32r killed %eax, implicit-def dead %eflags
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MOV32mr %rsp, 1, _, -4, _, killed %eax :: (store 4 into %ir.1)
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RETQ
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...
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---
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name: volatile_inc
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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body: |
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bb.0.entry:
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liveins: %rdi
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; CHECK: name: volatile_inc
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; CHECK: %eax = MOV32rm %rdi, 1, _, 0, _ :: (volatile load 4 from %ir.x)
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; CHECK: MOV32mr killed %rdi, 1, _, 0, _, %eax :: (volatile store 4 into %ir.x)
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%eax = MOV32rm %rdi, 1, _, 0, _ :: (volatile load 4 from %ir.x)
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%eax = INC32r killed %eax, implicit-def dead %eflags
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MOV32mr killed %rdi, 1, _, 0, _, %eax :: (volatile store 4 into %ir.x)
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RETQ %eax
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...
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---
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name: non_temporal_store
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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- { reg: '%esi' }
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body: |
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bb.0.entry:
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liveins: %esi, %rdi
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; CHECK: name: non_temporal_store
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; CHECK: MOVNTImr killed %rdi, 1, _, 0, _, killed %esi :: (non-temporal store 4 into %ir.a)
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MOVNTImr killed %rdi, 1, _, 0, _, killed %esi :: (non-temporal store 4 into %ir.a)
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RETQ
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...
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---
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name: invariant_load
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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body: |
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bb.0.entry:
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liveins: %rdi
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; CHECK: name: invariant_load
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; CHECK: %eax = MOV32rm killed %rdi, 1, _, 0, _ :: (invariant load 4 from %ir.x)
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%eax = MOV32rm killed %rdi, 1, _, 0, _ :: (invariant load 4 from %ir.x)
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RETQ %eax
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...
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---
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name: memory_offset
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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body: |
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bb.0.entry:
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liveins: %rdi
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; CHECK: name: memory_offset
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; CHECK: %xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec)
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; CHECK-NEXT: %xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16)
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; CHECK: MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec)
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; CHECK-NEXT: MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)
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%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec)
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%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16)
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%xmm2 = FsFLD0SS
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%xmm1 = MOVSSrr killed %xmm1, killed %xmm2
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MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec)
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MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)
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RETQ
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...
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---
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name: memory_alignment
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tracksRegLiveness: true
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liveins:
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- { reg: '%rdi' }
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body: |
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bb.0.entry:
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liveins: %rdi
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; CHECK: name: memory_alignment
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; CHECK: %xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)
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; CHECK-NEXT: %xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)
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; CHECK: MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)
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; CHECK-NEXT: MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)
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%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)
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%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)
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%xmm2 = FsFLD0SS
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%xmm1 = MOVSSrr killed %xmm1, killed %xmm2
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MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)
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MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)
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RETQ
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...
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---
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name: constant_pool_psv
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tracksRegLiveness: true
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liveins:
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- { reg: '%xmm0' }
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constants:
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- id: 0
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value: 'double 3.250000e+00'
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body: |
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bb.0.entry:
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liveins: %xmm0
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; CHECK: name: constant_pool_psv
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; CHECK: %xmm0 = ADDSDrm killed %xmm0, %rip, 1, _, %const.0, _ :: (load 8 from constant-pool)
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; CHECK-NEXT: %xmm0 = ADDSDrm killed %xmm0, %rip, 1, _, %const.0, _ :: (load 8 from constant-pool + 8)
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%xmm0 = ADDSDrm killed %xmm0, %rip, 1, _, %const.0, _ :: (load 8 from constant-pool)
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%xmm0 = ADDSDrm killed %xmm0, %rip, 1, _, %const.0, _ :: (load 8 from constant-pool + 8)
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RETQ %xmm0
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...
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---
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name: stack_psv
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tracksRegLiveness: true
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frameInfo:
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stackSize: 24
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maxAlignment: 16
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adjustsStack: true
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hasCalls: true
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maxCallFrameSize: 16
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fixedStack:
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- { id: 0, offset: 0, size: 10, alignment: 16, isImmutable: true, isAliased: false }
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body: |
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bb.0.entry:
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%rsp = frame-setup SUB64ri8 %rsp, 24, implicit-def dead %eflags
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CFI_INSTRUCTION def_cfa_offset 32
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LD_F80m %rsp, 1, _, 32, _, implicit-def dead %fpsw
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; CHECK: name: stack_psv
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; CHECK: ST_FP80m %rsp, 1, _, 0, _, implicit-def dead %fpsw :: (store 10 into stack, align 16)
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ST_FP80m %rsp, 1, _, 0, _, implicit-def dead %fpsw :: (store 10 into stack, align 16)
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CALL64pcrel32 $cosl, csr_64, implicit %rsp, implicit-def %rsp, implicit-def %fp0
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%rsp = ADD64ri8 %rsp, 24, implicit-def dead %eflags
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RETQ
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...
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---
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name: got_psv
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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; CHECK: name: got_psv
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; CHECK: %rax = MOV64rm %rip, 1, _, @G, _ :: (load 8 from got)
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%rax = MOV64rm %rip, 1, _, @G, _ :: (load 8 from got)
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%eax = MOV32rm killed %rax, 1, _, 0, _
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%eax = INC32r killed %eax, implicit-def dead %eflags
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RETQ %eax
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...
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---
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name: global_value
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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%rax = MOV64rm %rip, 1, _, @G, _
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; CHECK-LABEL: name: global_value
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; CHECK: %eax = MOV32rm killed %rax, 1, _, 0, _, implicit-def %rax :: (load 4 from @G)
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; CHECK: %ecx = MOV32rm killed %rcx, 1, _, 0, _, implicit-def %rcx :: (load 4 from @0)
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%eax = MOV32rm killed %rax, 1, _, 0, _, implicit-def %rax :: (load 4 from @G)
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%rcx = MOV64rm %rip, 1, _, @0, _
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%ecx = MOV32rm killed %rcx, 1, _, 0, _, implicit-def %rcx :: (load 4 from @0)
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%eax = LEA64_32r killed %rax, 1, killed %rcx, 1, _
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RETQ %eax
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...
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---
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name: jumptable_psv
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tracksRegLiveness: true
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liveins:
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- { reg: '%edi' }
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jumpTable:
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kind: label-difference32
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entries:
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- id: 0
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blocks: [ '%bb.3.lbl1', '%bb.4.lbl2', '%bb.5.lbl3', '%bb.6.lbl4' ]
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body: |
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bb.0.entry:
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successors: %bb.2.def, %bb.1.entry
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liveins: %edi
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%eax = MOV32rr %edi, implicit-def %rax
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CMP32ri8 killed %edi, 3, implicit-def %eflags
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JA_1 %bb.2.def, implicit killed %eflags
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bb.1.entry:
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successors: %bb.3.lbl1, %bb.4.lbl2, %bb.5.lbl3, %bb.6.lbl4
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liveins: %rax
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%rcx = LEA64r %rip, 1, _, %jump-table.0, _
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; CHECK: name: jumptable_psv
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; CHECK: %rax = MOVSX64rm32 %rcx, 4, killed %rax, 0, _ :: (load 4 from jump-table, align 8)
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%rax = MOVSX64rm32 %rcx, 4, killed %rax, 0, _ :: (load 4 from jump-table, align 8)
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%rax = ADD64rr killed %rax, killed %rcx, implicit-def dead %eflags
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JMP64r killed %rax
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bb.2.def:
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%eax = MOV32r0 implicit-def dead %eflags
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RETQ %eax
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bb.3.lbl1:
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%eax = MOV32ri 1
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RETQ %eax
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bb.4.lbl2:
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%eax = MOV32ri 2
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RETQ %eax
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bb.5.lbl3:
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%eax = MOV32ri 4
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RETQ %eax
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bb.6.lbl4:
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%eax = MOV32ri 8
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RETQ %eax
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...
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---
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name: tbaa_metadata
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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%rax = MOV64rm %rip, 1, _, @a, _ :: (load 8 from got)
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; CHECK-LABEL: name: tbaa_metadata
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; CHECK: %eax = MOV32rm killed %rax, 1, _, 0, _, implicit-def %rax :: (load 4 from @a, !tbaa !2)
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; CHECK-NEXT: %eax = MOV32rm killed %rax, 1, _, 0, _ :: (load 4 from %ir.total_len2, !tbaa !6)
|
|
%eax = MOV32rm killed %rax, 1, _, 0, _, implicit-def %rax :: (load 4 from @a, !tbaa !2)
|
|
%eax = MOV32rm killed %rax, 1, _, 0, _ :: (load 4 from %ir.total_len2, !tbaa !6)
|
|
RETQ %eax
|
|
...
|
|
---
|
|
name: aa_scope
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '%rdi' }
|
|
- { reg: '%rsi' }
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: %rdi, %rsi
|
|
; CHECK-LABEL: name: aa_scope
|
|
; CHECK: %xmm0 = MOVSSrm %rsi, 1, _, 0, _ :: (load 4 from %ir.c, !alias.scope !9)
|
|
%xmm0 = MOVSSrm %rsi, 1, _, 0, _ :: (load 4 from %ir.c, !alias.scope !9)
|
|
; CHECK-NEXT: MOVSSmr %rdi, 1, _, 20, _, killed %xmm0 :: (store 4 into %ir.arrayidx.i, !noalias !9)
|
|
MOVSSmr %rdi, 1, _, 20, _, killed %xmm0 :: (store 4 into %ir.arrayidx.i, !noalias !9)
|
|
%xmm0 = MOVSSrm killed %rsi, 1, _, 0, _ :: (load 4 from %ir.c)
|
|
MOVSSmr killed %rdi, 1, _, 28, _, killed %xmm0 :: (store 4 into %ir.arrayidx)
|
|
RETQ
|
|
...
|
|
---
|
|
name: range_metadata
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '%rdi' }
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: %rdi
|
|
; CHECK-LABEL: name: range_metadata
|
|
; CHECK: %al = MOV8rm killed %rdi, 1, _, 0, _ :: (load 1 from %ir.x, !range !11)
|
|
%al = MOV8rm killed %rdi, 1, _, 0, _ :: (load 1 from %ir.x, !range !11)
|
|
RETQ %al
|
|
...
|
|
---
|
|
name: gep_value
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '%rdi' }
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: %rdi
|
|
|
|
%rax = MOV64rm %rip, 1, _, @values, _ :: (load 8 from got)
|
|
; CHECK-LABEL: gep_value
|
|
; CHECK: MOV32mr killed %rax, 1, _, 0, _, %edi, implicit killed %rdi :: (store 4 into `i32* getelementptr inbounds ([50 x %st], [50 x %st]* @values, i64 0, i64 0, i32 0)`, align 16)
|
|
MOV32mr killed %rax, 1, _, 0, _, %edi, implicit killed %rdi :: (store 4 into `i32* getelementptr inbounds ([50 x %st], [50 x %st]* @values, i64 0, i64 0, i32 0)`, align 16)
|
|
RETQ
|
|
...
|
|
---
|
|
name: undef_value
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0.entry:
|
|
; CHECK-LABEL: name: undef_value
|
|
; CHECK: %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8 from `i8** undef`)
|
|
%rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8 from `i8** undef`)
|
|
RETQ %rax
|
|
...
|
|
---
|
|
# Test memory operand without associated value.
|
|
# CHECK-LABEL: name: dummy0
|
|
# CHECK: %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8)
|
|
name: dummy0
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
%rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8)
|
|
RETQ %rax
|
|
...
|
|
---
|
|
# Test parsing of stack references in machine memory operands.
|
|
# CHECK-LABEL: name: dummy1
|
|
# CHECK: %rax = MOV64rm %rsp, 1, _, 0, _ :: (load 8 from %stack.0)
|
|
name: dummy1
|
|
tracksRegLiveness: true
|
|
stack:
|
|
- { id: 0, size: 4, alignment: 4 }
|
|
body: |
|
|
bb.0:
|
|
%rax = MOV64rm %rsp, 1, _, 0, _ :: (load 8 from %stack.0)
|
|
RETQ %rax
|
|
|
|
...
|