llvm-project/llvm/test/CodeGen/SPARC
Daniel Cederman 0c05bdea2b [Sparc] Remove the support for builtin setjmp/longjmp
Summary: It is currently broken and for Sparc there is not much benefit
in using a builtin version compared to a library version. Both versions
needs to store the same four values in setjmp and flush the register
windows in longjmp. If the need for a builtin setjmp/longjmp arises there
is an improved implementation available at https://reviews.llvm.org/D50969.

Reviewers: jyknight, joerg, venkatra

Subscribers: fedor.sergeev, jrtc27, llvm-commits

Differential Revision: https://reviews.llvm.org/D51487

llvm-svn: 343210
2018-09-27 13:32:54 +00:00
..
32abi.ll [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
64abi.ll [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
64bit.ll
64cond.ll [Sparc] Return true in enableMultipleCopyHints(). 2018-02-24 08:24:31 +00:00
64spill.ll
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll
2009-08-28-WeakLinkage.ll
2011-01-11-CC.ll
2011-01-11-Call.ll
2011-01-11-FrameAddr.ll [Sparc] Flush register windows for @llvm.returnaddress(1) 2018-08-17 09:18:31 +00:00
2011-01-19-DelaySlot.ll
2011-01-21-ByValArgs.ll
2011-01-22-SRet.ll
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll
DbgValueOtherTargets.test
LeonCASAInstructionUT.ll
LeonDetectRoundChangePassUT.ll
LeonFixAllFDIVSQRTPassUT.ll
LeonInsertNOPLoadPassUT.ll
LeonItinerariesUT.ll [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
LeonSMACUMACInstructionUT.ll
analyze-branch.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
atomics.ll [Sparc] Use synthetic instruction clr to zero register instead of sethi 2018-04-20 07:47:12 +00:00
basictest.ll
blockaddr.ll
cast-sret-func.ll [Sparc] Get sret arg size from CallLoweringInfo.getArgs() 2018-08-17 10:40:00 +00:00
constpool.ll
constructor.ll
ctpop.ll
disable-fsmuld-fmuls.ll
empty-functions.ll
exception.ll
fail-alloca-align.ll
float-constants.ll [Sparc] Custom bitcast between f64 and v2i32 2018-08-27 07:14:53 +00:00
float.ll Revert r318704 - [Sparc] efficient pattern for UINT_TO_FP conversion 2017-12-11 22:25:04 +00:00
fp128.ll [Sparc] Get sret arg size from CallLoweringInfo.getArgs() 2018-08-17 10:40:00 +00:00
func-addr.ll
globals.ll
imm.ll [Sparc] Use synthetic instruction clr to zero register instead of sethi 2018-04-20 07:47:12 +00:00
inlineasm-bad.ll [Sparc] Select correct register class for FP register constraints 2018-05-30 06:07:55 +00:00
inlineasm-v9.ll [Sparc] Select correct register class for FP register constraints 2018-05-30 06:07:55 +00:00
inlineasm.ll Revert "[Sparc] Use the IntPair reg class for r constraints with value type f64" 2018-07-18 10:05:30 +00:00
leafproc.ll
lit.local.cfg
mature-mc-support.ll
missing-sret.ll
missinglabel.ll
mult-alt-generic-sparc.ll
multiple-div.ll
obj-relocs.ll
parts.ll
pic.ll [Sparc] Add support for 13-bit PIC 2018-06-11 05:50:08 +00:00
private.ll
readcycle.ll [Sparc] Add support for the cycle counter available in GR740 2018-08-27 11:11:47 +00:00
register-clobber.ll
rem.ll Regenerate remainder test. 2018-07-20 13:14:29 +00:00
reserved-regs.ll
select-mask.ll
sethiandn.ll [Sparc] Use ANDN instead of AND if constant can be encoded more efficiently 2018-08-30 14:05:26 +00:00
setjmp.ll
soft-float.ll NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
soft-mul-div.ll [Sparc] Use the names .rem and .urem instead of __modsi3 and __umodsi3 2018-07-16 12:22:08 +00:00
spill.ll
spillsize.ll
sret-secondary.ll
stack-align.ll [Sparc] Account for bias in stack readjustment 2018-01-29 12:10:32 +00:00
stack-protector.ll
thread-pointer.ll
tls.ll [Sparc] Include __tls_get_addr in symbol table for TLS calls to it 2018-02-21 15:25:26 +00:00
trap.ll [Sparc] Do not depend on icc for ta 1 2018-07-17 05:49:33 +00:00
umulo-128-legalisation-lowering.ll [SelectionDAG] Improve the legalisation lowering of UMULO. 2018-08-16 18:39:39 +00:00
varargs-v8.ll Avoid losing Hi part when expanding VAARG nodes on big endian machines 2018-07-16 12:14:17 +00:00
varargs.ll
vector-call.ll
vector-extract-elt.ll [Sparc] Use synthetic instruction clr to zero register instead of sethi 2018-04-20 07:47:12 +00:00
zerostructcall.ll