forked from OSchip/llvm-project
2500 lines
108 KiB
LLVM
2500 lines
108 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-unknown"
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; Stack reload folding tests.
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;
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; By including a nop call with sideeffects we can force a partial register spill of the
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; relevant registers and check that the reload is correctly folded into the instruction.
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define <2 x double> @stack_fold_addpd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: stack_fold_addpd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: addpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = fadd <2 x double> %a0, %a1
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ret <2 x double> %2
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}
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define <4 x float> @stack_fold_addps(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: stack_fold_addps:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: addps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = fadd <4 x float> %a0, %a1
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ret <4 x float> %2
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}
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define double @stack_fold_addsd(double %a0, double %a1) {
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; CHECK-LABEL: stack_fold_addsd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: addsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = fadd double %a0, %a1
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ret double %2
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}
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define <2 x double> @stack_fold_addsd_int(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: stack_fold_addsd_int:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: addsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = extractelement <2 x double> %a0, i32 0
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%3 = extractelement <2 x double> %a1, i32 0
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%4 = fadd double %2, %3
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%5 = insertelement <2 x double> %a0, double %4, i32 0
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ret <2 x double> %5
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}
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define float @stack_fold_addss(float %a0, float %a1) {
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; CHECK-LABEL: stack_fold_addss:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: addss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = fadd float %a0, %a1
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ret float %2
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}
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define <4 x float> @stack_fold_addss_int(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: stack_fold_addss_int:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: addss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = extractelement <4 x float> %a0, i32 0
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%3 = extractelement <4 x float> %a1, i32 0
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%4 = fadd float %2, %3
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%5 = insertelement <4 x float> %a0, float %4, i32 0
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ret <4 x float> %5
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}
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define <2 x double> @stack_fold_addsubpd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: stack_fold_addsubpd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: addsubpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1)
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ret <2 x double> %2
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}
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declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone
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define <4 x float> @stack_fold_addsubps(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: stack_fold_addsubps:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: addsubps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1)
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ret <4 x float> %2
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}
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declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone
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define <2 x double> @stack_fold_andnpd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: stack_fold_andnpd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: andnpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: xorpd %xmm1, %xmm1
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; CHECK-NEXT: addpd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = bitcast <2 x double> %a0 to <2 x i64>
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%3 = bitcast <2 x double> %a1 to <2 x i64>
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%4 = xor <2 x i64> %2, <i64 -1, i64 -1>
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%5 = and <2 x i64> %4, %3
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%6 = bitcast <2 x i64> %5 to <2 x double>
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; fadd forces execution domain
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%7 = fadd <2 x double> %6, <double 0x0, double 0x0>
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ret <2 x double> %7
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}
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define <4 x float> @stack_fold_andnps(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: stack_fold_andnps:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: andnps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: xorps %xmm1, %xmm1
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; CHECK-NEXT: addps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = bitcast <4 x float> %a0 to <2 x i64>
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%3 = bitcast <4 x float> %a1 to <2 x i64>
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%4 = xor <2 x i64> %2, <i64 -1, i64 -1>
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%5 = and <2 x i64> %4, %3
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%6 = bitcast <2 x i64> %5 to <4 x float>
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; fadd forces execution domain
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%7 = fadd <4 x float> %6, <float 0x0, float 0x0, float 0x0, float 0x0>
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ret <4 x float> %7
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}
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define <2 x double> @stack_fold_andpd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: stack_fold_andpd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: andpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: xorpd %xmm1, %xmm1
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; CHECK-NEXT: addpd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = bitcast <2 x double> %a0 to <2 x i64>
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%3 = bitcast <2 x double> %a1 to <2 x i64>
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%4 = and <2 x i64> %2, %3
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%5 = bitcast <2 x i64> %4 to <2 x double>
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; fadd forces execution domain
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%6 = fadd <2 x double> %5, <double 0x0, double 0x0>
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ret <2 x double> %6
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}
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define <4 x float> @stack_fold_andps(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: stack_fold_andps:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: andps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: xorps %xmm1, %xmm1
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; CHECK-NEXT: addps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = bitcast <4 x float> %a0 to <2 x i64>
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%3 = bitcast <4 x float> %a1 to <2 x i64>
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%4 = and <2 x i64> %2, %3
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%5 = bitcast <2 x i64> %4 to <4 x float>
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; fadd forces execution domain
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%6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>
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ret <4 x float> %6
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}
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define <2 x double> @stack_fold_blendpd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: stack_fold_blendpd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blendpd $2, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: # xmm0 = xmm0[0],mem[1]
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; CHECK-NEXT: xorpd %xmm1, %xmm1
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; CHECK-NEXT: addpd %xmm1, %xmm0
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = select <2 x i1> <i1 1, i1 0>, <2 x double> %a0, <2 x double> %a1
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; fadd forces execution domain
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%3 = fadd <2 x double> %2, <double 0x0, double 0x0>
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ret <2 x double> %3
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}
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define <4 x float> @stack_fold_blendps(<4 x float> %a0, <4 x float> %a1) {
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; CHECK-LABEL: stack_fold_blendps:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blendps $6, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
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; CHECK-NEXT: # xmm0 = xmm0[0],mem[1,2],xmm0[3]
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; CHECK-NEXT: xorps %xmm1, %xmm1
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; CHECK-NEXT: addps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = select <4 x i1> <i1 1, i1 0, i1 0, i1 1>, <4 x float> %a0, <4 x float> %a1
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; fadd forces execution domain
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%3 = fadd <4 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0>
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ret <4 x float> %3
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}
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define <2 x double> @stack_fold_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %c) {
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; CHECK-LABEL: stack_fold_blendvpd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: movapd %xmm1, %xmm2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blendvpd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
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; CHECK-NEXT: movapd %xmm2, %xmm0
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a1, <2 x double> %c, <2 x double> %a0)
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ret <2 x double> %2
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}
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declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
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define <4 x float> @stack_fold_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %c) {
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; CHECK-LABEL: stack_fold_blendvps:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: movaps %xmm1, %xmm2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blendvps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
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; CHECK-NEXT: movaps %xmm2, %xmm0
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; CHECK-NEXT: retq
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a1, <4 x float> %c, <4 x float> %a0)
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ret <4 x float> %2
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}
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declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
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define <2 x double> @stack_fold_cmppd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK-LABEL: stack_fold_cmppd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cmpeqpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 0)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_cmpps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_cmpps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cmpeqps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 0)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
|
|
|
|
define i32 @stack_fold_cmpsd(double %a0, double %a1) {
|
|
; CHECK-LABEL: stack_fold_cmpsd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cmpeqsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: movq %xmm0, %rax
|
|
; CHECK-NEXT: andl $1, %eax
|
|
; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp oeq double %a0, %a1
|
|
%3 = zext i1 %2 to i32
|
|
ret i32 %3
|
|
}
|
|
|
|
define <2 x double> @stack_fold_cmpsd_int(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_cmpsd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cmpeqsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 0)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone
|
|
|
|
define i32 @stack_fold_cmpss(float %a0, float %a1) {
|
|
; CHECK-LABEL: stack_fold_cmpss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cmpeqss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: movd %xmm0, %eax
|
|
; CHECK-NEXT: andl $1, %eax
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp oeq float %a0, %a1
|
|
%3 = zext i1 %2 to i32
|
|
ret i32 %3
|
|
}
|
|
|
|
define <4 x float> @stack_fold_cmpss_int(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_cmpss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cmpeqss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 0)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind readnone
|
|
|
|
; TODO stack_fold_comisd
|
|
|
|
define i32 @stack_fold_comisd_int(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_comisd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: comisd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: setnp %al
|
|
; CHECK-NEXT: sete %cl
|
|
; CHECK-NEXT: andb %al, %cl
|
|
; CHECK-NEXT: movzbl %cl, %eax
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1)
|
|
ret i32 %2
|
|
}
|
|
declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
; TODO stack_fold_comiss
|
|
|
|
define i32 @stack_fold_comiss_int(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_comiss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: comiss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: setnp %al
|
|
; CHECK-NEXT: sete %cl
|
|
; CHECK-NEXT: andb %al, %cl
|
|
; CHECK-NEXT: movzbl %cl, %eax
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1)
|
|
ret i32 %2
|
|
}
|
|
declare i32 @llvm.x86.sse.comieq.ss(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_cvtdq2pd(<4 x i32> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtdq2pd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtdq2pd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x i32> %a0, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
|
|
%3 = sitofp <2 x i32> %2 to <2 x double>
|
|
ret <2 x double> %3
|
|
}
|
|
|
|
define <2 x double> @stack_fold_cvtdq2pd_int(<4 x i32> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtdq2pd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtdq2pd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x i32> %a0, <4 x i32> %a0, <2 x i32> <i32 0, i32 1>
|
|
%cvt = sitofp <2 x i32> %2 to <2 x double>
|
|
ret <2 x double> %cvt
|
|
}
|
|
|
|
define <4 x float> @stack_fold_cvtdq2ps(<4 x i32> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtdq2ps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtdq2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = sitofp <4 x i32> %a0 to <4 x float>
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define <4 x i32> @stack_fold_cvtpd2dq(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtpd2dq:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtpd2dq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> %a0)
|
|
ret <4 x i32> %2
|
|
}
|
|
declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>) nounwind readnone
|
|
|
|
define <2 x float> @stack_fold_cvtpd2ps(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtpd2ps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtpd2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fptrunc <2 x double> %a0 to <2 x float>
|
|
ret <2 x float> %2
|
|
}
|
|
|
|
define <4 x i32> @stack_fold_cvtps2dq(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtps2dq:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtps2dq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> %a0)
|
|
ret <4 x i32> %2
|
|
}
|
|
declare <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_cvtps2pd(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtps2pd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtps2pd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x float> %a0, <4 x float> undef, <2 x i32> <i32 0, i32 1>
|
|
%3 = fpext <2 x float> %2 to <2 x double>
|
|
ret <2 x double> %3
|
|
}
|
|
|
|
define <2 x double> @stack_fold_cvtps2pd_int(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtps2pd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtps2pd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x float> %a0, <4 x float> %a0, <2 x i32> <i32 0, i32 1>
|
|
%cvtps2pd = fpext <2 x float> %2 to <2 x double>
|
|
ret <2 x double> %cvtps2pd
|
|
}
|
|
|
|
; TODO stack_fold_cvtsd2si
|
|
|
|
define i32 @stack_fold_cvtsd2si_int(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtsd2si_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtsd2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a0)
|
|
ret i32 %2
|
|
}
|
|
declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone
|
|
|
|
; TODO stack_fold_cvtsd2si64
|
|
|
|
define i64 @stack_fold_cvtsd2si64_int(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtsd2si64_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtsd2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0)
|
|
ret i64 %2
|
|
}
|
|
declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
|
|
|
|
define float @stack_fold_cvtsd2ss(double %a0) minsize {
|
|
; CHECK-LABEL: stack_fold_cvtsd2ss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: cvtsd2ss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fptrunc double %a0 to float
|
|
ret float %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_cvtsd2ss_int(<2 x double> %a0) optsize {
|
|
; CHECK-LABEL: stack_fold_cvtsd2ss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm1, %xmm1
|
|
; CHECK-NEXT: cvtsd2ss {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
|
|
; CHECK-NEXT: movaps %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> <float 0x0, float 0x0, float 0x0, float 0x0>, <2 x double> %a0)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float>, <2 x double>) nounwind readnone
|
|
|
|
define double @stack_fold_cvtsi2sd(i32 %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtsi2sd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: cvtsi2sdl {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
%2 = sitofp i32 %a0 to double
|
|
ret double %2
|
|
}
|
|
|
|
define <2 x double> @stack_fold_cvtsi2sd_int(i32 %a0, <2 x double> %b0) {
|
|
; CHECK-LABEL: stack_fold_cvtsi2sd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtsi2sdl {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
%2 = sitofp i32 %a0 to double
|
|
%3 = insertelement <2 x double> %b0, double %2, i64 0
|
|
ret <2 x double> %3
|
|
}
|
|
|
|
define double @stack_fold_cvtsi642sd(i64 %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtsi642sd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: cvtsi2sdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
%2 = sitofp i64 %a0 to double
|
|
ret double %2
|
|
}
|
|
|
|
define <2 x double> @stack_fold_cvtsi642sd_int(i64 %a0, <2 x double> %b0) {
|
|
; CHECK-LABEL: stack_fold_cvtsi642sd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtsi2sdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
%2 = sitofp i64 %a0 to double
|
|
%3 = insertelement <2 x double> %b0, double %2, i64 0
|
|
ret <2 x double> %3
|
|
}
|
|
|
|
define float @stack_fold_cvtsi2ss(i32 %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtsi2ss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: cvtsi2ssl {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
%2 = sitofp i32 %a0 to float
|
|
ret float %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_cvtsi2ss_int(i32 %a0, <4 x float> %b0) {
|
|
; CHECK-LABEL: stack_fold_cvtsi2ss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtsi2ssl {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
%2 = sitofp i32 %a0 to float
|
|
%3 = insertelement <4 x float> %b0, float %2, i64 0
|
|
ret <4 x float> %3
|
|
}
|
|
|
|
define float @stack_fold_cvtsi642ss(i64 %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtsi642ss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: cvtsi2ssq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
%2 = sitofp i64 %a0 to float
|
|
ret float %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_cvtsi642ss_int(i64 %a0, <4 x float> %b0) {
|
|
; CHECK-LABEL: stack_fold_cvtsi642ss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtsi2ssq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
%2 = sitofp i64 %a0 to float
|
|
%3 = insertelement <4 x float> %b0, float %2, i64 0
|
|
ret <4 x float> %3
|
|
}
|
|
|
|
define double @stack_fold_cvtss2sd(float %a0) minsize {
|
|
; CHECK-LABEL: stack_fold_cvtss2sd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: cvtss2sd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fpext float %a0 to double
|
|
ret double %2
|
|
}
|
|
|
|
define <2 x double> @stack_fold_cvtss2sd_int(<4 x float> %a0) optsize {
|
|
; CHECK-LABEL: stack_fold_cvtss2sd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: cvtss2sd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <4 x float> %a0, i64 0
|
|
%3 = fpext float %2 to double
|
|
%4 = insertelement <2 x double> zeroinitializer, double %3, i64 0
|
|
ret <2 x double> %4
|
|
}
|
|
|
|
; TODO stack_fold_cvtss2si
|
|
|
|
define i32 @stack_fold_cvtss2si_int(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtss2si_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtss2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0)
|
|
ret i32 %2
|
|
}
|
|
declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
|
|
|
|
; TODO stack_fold_cvtss2si64
|
|
|
|
define i64 @stack_fold_cvtss2si64_int(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvtss2si64_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvtss2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0)
|
|
ret i64 %2
|
|
}
|
|
declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone
|
|
|
|
define <4 x i32> @stack_fold_cvttpd2dq(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttpd2dq:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttpd2dq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> %a0)
|
|
ret <4 x i32> %2
|
|
}
|
|
declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>) nounwind readnone
|
|
|
|
define <4 x i32> @stack_fold_cvttps2dq(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttps2dq:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttps2dq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fptosi <4 x float> %a0 to <4 x i32>
|
|
ret <4 x i32> %2
|
|
}
|
|
|
|
define i32 @stack_fold_cvttsd2si(double %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttsd2si:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttsd2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fptosi double %a0 to i32
|
|
ret i32 %2
|
|
}
|
|
|
|
define i32 @stack_fold_cvttsd2si_int(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttsd2si_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttsd2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %a0)
|
|
ret i32 %2
|
|
}
|
|
declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone
|
|
|
|
define i64 @stack_fold_cvttsd2si64(double %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttsd2si64:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttsd2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fptosi double %a0 to i64
|
|
ret i64 %2
|
|
}
|
|
|
|
define i64 @stack_fold_cvttsd2si64_int(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttsd2si64_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttsd2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0)
|
|
ret i64 %2
|
|
}
|
|
declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
|
|
|
|
define i32 @stack_fold_cvttss2si(float %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttss2si:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttss2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fptosi float %a0 to i32
|
|
ret i32 %2
|
|
}
|
|
|
|
define i32 @stack_fold_cvttss2si_int(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttss2si_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttss2si {{[-0-9]+}}(%r{{[sb]}}p), %eax # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0)
|
|
ret i32 %2
|
|
}
|
|
declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
|
|
|
|
define i64 @stack_fold_cvttss2si64(float %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttss2si64:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttss2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fptosi float %a0 to i64
|
|
ret i64 %2
|
|
}
|
|
|
|
define i64 @stack_fold_cvttss2si64_int(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_cvttss2si64_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: cvttss2si {{[-0-9]+}}(%r{{[sb]}}p), %rax # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %a0)
|
|
ret i64 %2
|
|
}
|
|
declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_divpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_divpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: divpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fdiv <2 x double> %a0, %a1
|
|
ret <2 x double> %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_divps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_divps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: divps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fdiv <4 x float> %a0, %a1
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define double @stack_fold_divsd(double %a0, double %a1) {
|
|
; CHECK-LABEL: stack_fold_divsd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: divsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fdiv double %a0, %a1
|
|
ret double %2
|
|
}
|
|
|
|
define <2 x double> @stack_fold_divsd_int(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_divsd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: divsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <2 x double> %a0, i32 0
|
|
%3 = extractelement <2 x double> %a1, i32 0
|
|
%4 = fdiv double %2, %3
|
|
%5 = insertelement <2 x double> %a0, double %4, i32 0
|
|
ret <2 x double> %5
|
|
}
|
|
declare <2 x double> @llvm.x86.sse2.div.sd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
define float @stack_fold_divss(float %a0, float %a1) {
|
|
; CHECK-LABEL: stack_fold_divss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: divss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fdiv float %a0, %a1
|
|
ret float %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_divss_int(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_divss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: divss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <4 x float> %a0, i32 0
|
|
%3 = extractelement <4 x float> %a1, i32 0
|
|
%4 = fdiv float %2, %3
|
|
%5 = insertelement <4 x float> %a0, float %4, i32 0
|
|
ret <4 x float> %5
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.div.ss(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_dppd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_dppd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: dppd $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i8) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_dpps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_dpps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: dpps $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind readnone
|
|
|
|
define i32 @stack_fold_extractps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_extractps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: pushq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: pushq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: pushq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: pushq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: pushq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: pushq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 56
|
|
; CHECK-NEXT: .cfi_offset %rbx, -56
|
|
; CHECK-NEXT: .cfi_offset %r12, -48
|
|
; CHECK-NEXT: .cfi_offset %r13, -40
|
|
; CHECK-NEXT: .cfi_offset %r14, -32
|
|
; CHECK-NEXT: .cfi_offset %r15, -24
|
|
; CHECK-NEXT: .cfi_offset %rbp, -16
|
|
; CHECK-NEXT: addps %xmm1, %xmm0
|
|
; CHECK-NEXT: extractps $1, %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Folded Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
|
|
; CHECK-NEXT: popq %rbx
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 48
|
|
; CHECK-NEXT: popq %r12
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 40
|
|
; CHECK-NEXT: popq %r13
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: popq %r14
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 24
|
|
; CHECK-NEXT: popq %r15
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-NEXT: popq %rbp
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 8
|
|
; CHECK-NEXT: retq
|
|
; fadd forces execution domain
|
|
%1 = fadd <4 x float> %a0, %a1
|
|
%2 = extractelement <4 x float> %1, i32 1
|
|
%3 = bitcast float %2 to i32
|
|
%4 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
|
ret i32 %3
|
|
}
|
|
|
|
define <2 x double> @stack_fold_haddpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_haddpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: haddpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_haddps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_haddps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: haddps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_hsubpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_hsubpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: hsubpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_hsubps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_hsubps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: hsubps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_insertps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_insertps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: insertps $17, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = zero,mem[0],xmm0[2,3]
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 209)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_maxpd(<2 x double> %a0, <2 x double> %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_maxpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_maxpd_commutable(<2 x double> %a0, <2 x double> %a1) #1 {
|
|
; CHECK-LABEL: stack_fold_maxpd_commutable:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1)
|
|
ret <2 x double> %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_maxps(<4 x float> %a0, <4 x float> %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_maxps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_maxps_commutable(<4 x float> %a0, <4 x float> %a1) #1 {
|
|
; CHECK-LABEL: stack_fold_maxps_commutable:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1)
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define double @stack_fold_maxsd(double %a0, double %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_maxsd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp ogt double %a0, %a1
|
|
%3 = select i1 %2, double %a0, double %a1
|
|
ret double %3
|
|
}
|
|
|
|
define double @stack_fold_maxsd_commutable(double %a0, double %a1) #1 {
|
|
; CHECK-LABEL: stack_fold_maxsd_commutable:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp ogt double %a0, %a1
|
|
%3 = select i1 %2, double %a0, double %a1
|
|
ret double %3
|
|
}
|
|
|
|
define <2 x double> @stack_fold_maxsd_int(<2 x double> %a0, <2 x double> %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_maxsd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> %a0, <2 x double> %a1)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
define float @stack_fold_maxss(float %a0, float %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_maxss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp ogt float %a0, %a1
|
|
%3 = select i1 %2, float %a0, float %a1
|
|
ret float %3
|
|
}
|
|
|
|
define float @stack_fold_maxss_commutable(float %a0, float %a1) #1 {
|
|
; CHECK-LABEL: stack_fold_maxss_commutable:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp ogt float %a0, %a1
|
|
%3 = select i1 %2, float %a0, float %a1
|
|
ret float %3
|
|
}
|
|
|
|
define <4 x float> @stack_fold_maxss_int(<4 x float> %a0, <4 x float> %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_maxss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: maxss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a0, <4 x float> %a1)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_minpd(<2 x double> %a0, <2 x double> %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_minpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_minpd_commutable(<2 x double> %a0, <2 x double> %a1) #1 {
|
|
; CHECK-LABEL: stack_fold_minpd_commutable:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1)
|
|
ret <2 x double> %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_minps(<4 x float> %a0, <4 x float> %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_minps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_minps_commutable(<4 x float> %a0, <4 x float> %a1) #1 {
|
|
; CHECK-LABEL: stack_fold_minps_commutable:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1)
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define double @stack_fold_minsd(double %a0, double %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_minsd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp olt double %a0, %a1
|
|
%3 = select i1 %2, double %a0, double %a1
|
|
ret double %3
|
|
}
|
|
|
|
define double @stack_fold_minsd_commutable(double %a0, double %a1) #1 {
|
|
; CHECK-LABEL: stack_fold_minsd_commutable:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp olt double %a0, %a1
|
|
%3 = select i1 %2, double %a0, double %a1
|
|
ret double %3
|
|
}
|
|
|
|
define <2 x double> @stack_fold_minsd_int(<2 x double> %a0, <2 x double> %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_minsd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> %a0, <2 x double> %a1)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
define float @stack_fold_minss(float %a0, float %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_minss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp olt float %a0, %a1
|
|
%3 = select i1 %2, float %a0, float %a1
|
|
ret float %3
|
|
}
|
|
|
|
define float @stack_fold_minss_commutable(float %a0, float %a1) #1 {
|
|
; CHECK-LABEL: stack_fold_minss_commutable:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp olt float %a0, %a1
|
|
%3 = select i1 %2, float %a0, float %a1
|
|
ret float %3
|
|
}
|
|
|
|
define <4 x float> @stack_fold_minss_int(<4 x float> %a0, <4 x float> %a1) #0 {
|
|
; CHECK-LABEL: stack_fold_minss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: minss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a0, <4 x float> %a1)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_movddup(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_movddup:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movddup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = mem[0,0]
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <2 x double> %a0, <2 x double> undef, <2 x i32> <i32 0, i32 0>
|
|
ret <2 x double> %2
|
|
}
|
|
; TODO stack_fold_movhpd (load / store)
|
|
; TODO stack_fold_movhps (load / store)
|
|
|
|
; TODO stack_fold_movlpd (load / store)
|
|
; TODO stack_fold_movlps (load / store)
|
|
|
|
define <4 x float> @stack_fold_movshdup(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_movshdup:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movshdup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = mem[1,1,3,3]
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_movsldup(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_movsldup:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movsldup {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = mem[0,0,2,2]
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define <2 x double> @stack_fold_mulpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_mulpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: mulpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fmul <2 x double> %a0, %a1
|
|
ret <2 x double> %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_mulps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_mulps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: mulps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fmul <4 x float> %a0, %a1
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define double @stack_fold_mulsd(double %a0, double %a1) {
|
|
; CHECK-LABEL: stack_fold_mulsd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: mulsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fmul double %a0, %a1
|
|
ret double %2
|
|
}
|
|
|
|
define <2 x double> @stack_fold_mulsd_int(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_mulsd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: mulsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <2 x double> %a0, i32 0
|
|
%3 = extractelement <2 x double> %a1, i32 0
|
|
%4 = fmul double %2, %3
|
|
%5 = insertelement <2 x double> %a0, double %4, i32 0
|
|
ret <2 x double> %5
|
|
}
|
|
|
|
define float @stack_fold_mulss(float %a0, float %a1) {
|
|
; CHECK-LABEL: stack_fold_mulss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: mulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fmul float %a0, %a1
|
|
ret float %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_mulss_int(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_mulss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: mulss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <4 x float> %a0, i32 0
|
|
%3 = extractelement <4 x float> %a1, i32 0
|
|
%4 = fmul float %2, %3
|
|
%5 = insertelement <4 x float> %a0, float %4, i32 0
|
|
ret <4 x float> %5
|
|
}
|
|
|
|
define <2 x double> @stack_fold_orpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_orpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: orpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: xorpd %xmm1, %xmm1
|
|
; CHECK-NEXT: addpd %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = bitcast <2 x double> %a0 to <2 x i64>
|
|
%3 = bitcast <2 x double> %a1 to <2 x i64>
|
|
%4 = or <2 x i64> %2, %3
|
|
%5 = bitcast <2 x i64> %4 to <2 x double>
|
|
; fadd forces execution domain
|
|
%6 = fadd <2 x double> %5, <double 0x0, double 0x0>
|
|
ret <2 x double> %6
|
|
}
|
|
|
|
define <4 x float> @stack_fold_orps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_orps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: orps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: xorps %xmm1, %xmm1
|
|
; CHECK-NEXT: addps %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = bitcast <4 x float> %a0 to <2 x i64>
|
|
%3 = bitcast <4 x float> %a1 to <2 x i64>
|
|
%4 = or <2 x i64> %2, %3
|
|
%5 = bitcast <2 x i64> %4 to <4 x float>
|
|
; fadd forces execution domain
|
|
%6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>
|
|
ret <4 x float> %6
|
|
}
|
|
|
|
; TODO stack_fold_rcpps
|
|
|
|
define <4 x float> @stack_fold_rcpps_int(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_rcpps_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: rcpps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %a0)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>) nounwind readnone
|
|
|
|
; TODO stack_fold_rcpss
|
|
|
|
define <4 x float> @stack_fold_rcpss_int(<4 x float> %a0, <4 x float> %a1) optsize {
|
|
; CHECK-LABEL: stack_fold_rcpss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
|
|
; CHECK-NEXT: rcpss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a1)
|
|
%3 = extractelement <4 x float> %2, i32 0
|
|
%4 = insertelement <4 x float> %a0, float %3, i32 0
|
|
ret <4 x float> %4
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>)
|
|
|
|
define <2 x double> @stack_fold_roundpd(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_roundpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: roundpd $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_roundps(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_roundps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: roundps $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone
|
|
|
|
define double @stack_fold_roundsd(double %a0) optsize {
|
|
; CHECK-LABEL: stack_fold_roundsd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: roundsd $9, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call double @llvm.floor.f64(double %a0)
|
|
ret double %2
|
|
}
|
|
declare double @llvm.floor.f64(double) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_roundsd_int(<2 x double> %a0, <2 x double> %a1) optsize {
|
|
; CHECK-LABEL: stack_fold_roundsd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
|
|
; CHECK-NEXT: roundsd $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7)
|
|
ret <2 x double> %2
|
|
}
|
|
declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone
|
|
|
|
define float @stack_fold_roundss(float %a0) minsize {
|
|
; CHECK-LABEL: stack_fold_roundss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: roundss $9, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call float @llvm.floor.f32(float %a0)
|
|
ret float %2
|
|
}
|
|
declare float @llvm.floor.f32(float) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_roundss_int(<4 x float> %a0, <4 x float> %a1) optsize {
|
|
; CHECK-LABEL: stack_fold_roundss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
|
|
; CHECK-NEXT: roundss $7, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone
|
|
|
|
; TODO stack_fold_rsqrtps
|
|
|
|
define <4 x float> @stack_fold_rsqrtps_int(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_rsqrtps_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: rsqrtps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %a0)
|
|
ret <4 x float> %2
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>) nounwind readnone
|
|
|
|
; TODO stack_fold_rsqrtss
|
|
|
|
define <4 x float> @stack_fold_rsqrtss_int(<4 x float> %a0, <4 x float> %a1) optsize {
|
|
; CHECK-LABEL: stack_fold_rsqrtss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
|
|
; CHECK-NEXT: rsqrtss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a1)
|
|
%3 = extractelement <4 x float> %2, i32 0
|
|
%4 = insertelement <4 x float> %a0, float %3, i32 0
|
|
ret <4 x float> %4
|
|
}
|
|
declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>)
|
|
|
|
define <2 x double> @stack_fold_shufpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_shufpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: shufpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = xmm0[1],mem[0]
|
|
; CHECK-NEXT: xorpd %xmm1, %xmm1
|
|
; CHECK-NEXT: addpd %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 1, i32 2>
|
|
; fadd forces execution domain
|
|
%3 = fadd <2 x double> %2, <double 0x0, double 0x0>
|
|
ret <2 x double> %3
|
|
}
|
|
|
|
define <4 x float> @stack_fold_shufps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_shufps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: shufps $200, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = xmm0[0,2],mem[0,3]
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 2, i32 4, i32 7>
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define <2 x double> @stack_fold_sqrtpd(<2 x double> %a0) {
|
|
; CHECK-LABEL: stack_fold_sqrtpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: sqrtpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <2 x double> @llvm.sqrt.v2f64(<2 x double> %a0)
|
|
ret <2 x double> %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_sqrtps(<4 x float> %a0) {
|
|
; CHECK-LABEL: stack_fold_sqrtps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: sqrtps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %a0)
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define double @stack_fold_sqrtsd(double %a0) optsize {
|
|
; CHECK-LABEL: stack_fold_sqrtsd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: sqrtsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call double @llvm.sqrt.f64(double %a0)
|
|
ret double %2
|
|
}
|
|
declare double @llvm.sqrt.f64(double) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_sqrtsd_int(<2 x double> %a0, <2 x double> %a1) optsize {
|
|
; CHECK-LABEL: stack_fold_sqrtsd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movapd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
|
|
; CHECK-NEXT: sqrtsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <2 x double> %a1, i64 0
|
|
%3 = call double @llvm.sqrt.f64(double %2)
|
|
%4 = insertelement <2 x double> %a1, double %3, i64 0
|
|
%5 = extractelement <2 x double> %4, i32 0
|
|
%6 = insertelement <2 x double> %a0, double %5, i32 0
|
|
ret <2 x double> %6
|
|
}
|
|
|
|
define float @stack_fold_sqrtss(float %a0) minsize {
|
|
; CHECK-LABEL: stack_fold_sqrtss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps %xmm0, %xmm0
|
|
; CHECK-NEXT: sqrtss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call float @llvm.sqrt.f32(float %a0)
|
|
ret float %2
|
|
}
|
|
declare float @llvm.sqrt.f32(float) nounwind readnone
|
|
|
|
define <4 x float> @stack_fold_sqrtss_int(<4 x float> %a0, <4 x float> %a1) optsize {
|
|
; CHECK-LABEL: stack_fold_sqrtss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
|
|
; CHECK-NEXT: sqrtss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <4 x float> %a1, i64 0
|
|
%3 = call float @llvm.sqrt.f32(float %2)
|
|
%4 = insertelement <4 x float> %a1, float %3, i64 0
|
|
%5 = extractelement <4 x float> %4, i32 0
|
|
%6 = insertelement <4 x float> %a0, float %5, i32 0
|
|
ret <4 x float> %6
|
|
}
|
|
|
|
define <2 x double> @stack_fold_subpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_subpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: subpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fsub <2 x double> %a0, %a1
|
|
ret <2 x double> %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_subps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_subps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: subps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fsub <4 x float> %a0, %a1
|
|
ret <4 x float> %2
|
|
}
|
|
|
|
define double @stack_fold_subsd(double %a0, double %a1) {
|
|
; CHECK-LABEL: stack_fold_subsd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: subsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fsub double %a0, %a1
|
|
ret double %2
|
|
}
|
|
|
|
define <2 x double> @stack_fold_subsd_int(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_subsd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: subsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <2 x double> %a0, i32 0
|
|
%3 = extractelement <2 x double> %a1, i32 0
|
|
%4 = fsub double %2, %3
|
|
%5 = insertelement <2 x double> %a0, double %4, i32 0
|
|
ret <2 x double> %5
|
|
}
|
|
|
|
define float @stack_fold_subss(float %a0, float %a1) {
|
|
; CHECK-LABEL: stack_fold_subss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: subss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fsub float %a0, %a1
|
|
ret float %2
|
|
}
|
|
|
|
define <4 x float> @stack_fold_subss_int(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_subss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: subss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = extractelement <4 x float> %a0, i32 0
|
|
%3 = extractelement <4 x float> %a1, i32 0
|
|
%4 = fsub float %2, %3
|
|
%5 = insertelement <4 x float> %a0, float %4, i32 0
|
|
ret <4 x float> %5
|
|
}
|
|
|
|
define i32 @stack_fold_ucomisd(double %a0, double %a1) {
|
|
; CHECK-LABEL: stack_fold_ucomisd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movsd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
; CHECK-NEXT: ucomisd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
|
|
; CHECK-NEXT: sete %al
|
|
; CHECK-NEXT: leal -1(%rax,%rax), %eax
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp ueq double %a0, %a1
|
|
%3 = select i1 %2, i32 1, i32 -1
|
|
ret i32 %3
|
|
}
|
|
|
|
define i32 @stack_fold_ucomisd_int(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_ucomisd_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: ucomisd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: setnp %al
|
|
; CHECK-NEXT: sete %cl
|
|
; CHECK-NEXT: andb %al, %cl
|
|
; CHECK-NEXT: movzbl %cl, %eax
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1)
|
|
ret i32 %2
|
|
}
|
|
declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>) nounwind readnone
|
|
|
|
define i32 @stack_fold_ucomiss(float %a0, float %a1) {
|
|
; CHECK-LABEL: stack_fold_ucomiss:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movss %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorl %eax, %eax
|
|
; CHECK-NEXT: ucomiss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
|
|
; CHECK-NEXT: sete %al
|
|
; CHECK-NEXT: leal -1(%rax,%rax), %eax
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = fcmp ueq float %a0, %a1
|
|
%3 = select i1 %2, i32 1, i32 -1
|
|
ret i32 %3
|
|
}
|
|
|
|
define i32 @stack_fold_ucomiss_int(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_ucomiss_int:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: ucomiss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: setnp %al
|
|
; CHECK-NEXT: sete %cl
|
|
; CHECK-NEXT: andb %al, %cl
|
|
; CHECK-NEXT: movzbl %cl, %eax
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1)
|
|
ret i32 %2
|
|
}
|
|
declare i32 @llvm.x86.sse.ucomieq.ss(<4 x float>, <4 x float>) nounwind readnone
|
|
|
|
define <2 x double> @stack_fold_unpckhpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_unpckhpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: unpckhpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = xmm0[1],mem[1]
|
|
; CHECK-NEXT: xorpd %xmm1, %xmm1
|
|
; CHECK-NEXT: addpd %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 1, i32 3>
|
|
; fadd forces execution domain
|
|
%3 = fadd <2 x double> %2, <double 0x0, double 0x0>
|
|
ret <2 x double> %3
|
|
}
|
|
|
|
define <4 x float> @stack_fold_unpckhps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_unpckhps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: unpckhps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = xmm0[2],mem[2],xmm0[3],mem[3]
|
|
; CHECK-NEXT: xorps %xmm1, %xmm1
|
|
; CHECK-NEXT: addps %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
|
|
; fadd forces execution domain
|
|
%3 = fadd <4 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0>
|
|
ret <4 x float> %3
|
|
}
|
|
|
|
define <2 x double> @stack_fold_unpcklpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_unpcklpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: unpcklpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
|
|
; CHECK-NEXT: xorpd %xmm1, %xmm1
|
|
; CHECK-NEXT: addpd %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 0, i32 2>
|
|
; fadd forces execution domain
|
|
%3 = fadd <2 x double> %2, <double 0x0, double 0x0>
|
|
ret <2 x double> %3
|
|
}
|
|
|
|
define <4 x float> @stack_fold_unpcklps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_unpcklps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: unpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
|
|
; CHECK-NEXT: xorps %xmm1, %xmm1
|
|
; CHECK-NEXT: addps %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
|
|
; fadd forces execution domain
|
|
%3 = fadd <4 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0>
|
|
ret <4 x float> %3
|
|
}
|
|
|
|
define <2 x double> @stack_fold_xorpd(<2 x double> %a0, <2 x double> %a1) {
|
|
; CHECK-LABEL: stack_fold_xorpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorpd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: xorpd %xmm1, %xmm1
|
|
; CHECK-NEXT: addpd %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = bitcast <2 x double> %a0 to <2 x i64>
|
|
%3 = bitcast <2 x double> %a1 to <2 x i64>
|
|
%4 = xor <2 x i64> %2, %3
|
|
%5 = bitcast <2 x i64> %4 to <2 x double>
|
|
; fadd forces execution domain
|
|
%6 = fadd <2 x double> %5, <double 0x0, double 0x0>
|
|
ret <2 x double> %6
|
|
}
|
|
|
|
define <4 x float> @stack_fold_xorps(<4 x float> %a0, <4 x float> %a1) {
|
|
; CHECK-LABEL: stack_fold_xorps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
|
|
; CHECK-NEXT: #APP
|
|
; CHECK-NEXT: nop
|
|
; CHECK-NEXT: #NO_APP
|
|
; CHECK-NEXT: xorps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
|
|
; CHECK-NEXT: xorps %xmm1, %xmm1
|
|
; CHECK-NEXT: addps %xmm1, %xmm0
|
|
; CHECK-NEXT: retq
|
|
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
|
|
%2 = bitcast <4 x float> %a0 to <2 x i64>
|
|
%3 = bitcast <4 x float> %a1 to <2 x i64>
|
|
%4 = xor <2 x i64> %2, %3
|
|
%5 = bitcast <2 x i64> %4 to <4 x float>
|
|
; fadd forces execution domain
|
|
%6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>
|
|
ret <4 x float> %6
|
|
}
|
|
|
|
declare <2 x double> @llvm.sqrt.v2f64(<2 x double>)
|
|
declare <4 x float> @llvm.sqrt.v4f32(<4 x float>)
|
|
|
|
attributes #0 = { "unsafe-fp-math"="false" }
|
|
attributes #1 = { "unsafe-fp-math"="true" }
|