forked from OSchip/llvm-project
3aa8a90eff
Previously only the superscalar scheduled expansion of the dla macro for MIPS64 was implemented. If assembler temporary register is not available and the optional source register is not the destination register, synthesize the address using the naive solution of adds and shifts. This partially resolves PR/30383. Thanks to Sean Bruno for reporting the issue! Reviewers: slthakur, seanbruno Differential Revision: https://reviews.llvm.org/D29328 llvm-svn: 294182 |
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clang | ||
clang-tools-extra | ||
compiler-rt | ||
debuginfo-tests | ||
libclc | ||
libcxx | ||
libcxxabi | ||
libunwind | ||
lld | ||
lldb | ||
llgo | ||
llvm | ||
openmp | ||
parallel-libs | ||
polly |