forked from OSchip/llvm-project
93 lines
2.3 KiB
Plaintext
93 lines
2.3 KiB
Plaintext
# RUN: not llvm-mc -triple=thumbv7 -mcpu=cortex-a8 -disassemble < %s 2> %t | FileCheck %s
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# RUN: FileCheck --check-prefix=ERROR < %t %s
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[0x09,0xea,0x08,0x04]
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# CHECK: and.w r4, r9, r8
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[0x09,0xea,0x08,0x84]
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# CHECK: and.w r4, r9, r8
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# ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
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[0x04,0xea,0xe8,0x01]
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# CHECK: and.w r1, r4, r8, asr #3
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[0x04,0xea,0xe8,0x81]
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# CHECK: and.w r1, r4, r8, asr #3
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# ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
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[0x11,0xea,0x47,0x02]
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# CHECK: ands.w r2, r1, r7, lsl #1
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[0x11,0xea,0x47,0x82]
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# CHECK: ands.w r2, r1, r7, lsl #1
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# ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
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[0x45,0xea,0x06,0x04]
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# CHECK: orr.w r4, r5, r6
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[0x45,0xea,0x06,0x84]
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# ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
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[0x45,0xea,0x46,0x14]
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# CHECK: orr.w r4, r5, r6, lsl #5
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[0x45,0xea,0x46,0x94]
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# ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
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[0x55,0xea,0x56,0x14]
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# CHECK: orrs.w r4, r5, r6, lsr #5
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[0x55,0xea,0x56,0x94]
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# ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
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[0x85,0xea,0x06,0x04]
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# CHECK: eor.w r4, r5, r6
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[0x85,0xea,0x06,0x84]
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# CHECK: eor.w r4, r5, r6
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# ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
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[0x85,0xea,0x46,0x14]
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# CHECK: eor.w r4, r5, r6, lsl #5
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[0x85,0xea,0x46,0x94]
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# CHECK: eor.w r4, r5, r6, lsl #5
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# ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
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[0x4f,0xea,0x02,0x01]
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# CHECK: mov.w r1, r2
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[0x4f,0xea,0x02,0x81]
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# ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
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[0x4f,0xea,0x02,0x46]
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# CHECK: lsl.w r6, r2, #16
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[0x4f,0xea,0x02,0xc6]
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# ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
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[0x4f,0xea,0x12,0x46]
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# CHECK: lsr.w r6, r2, #16
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[0x4f,0xea,0x12,0xc6]
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# ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
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[0x5f,0xea,0x22,0x06]
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# CHECK: asrs.w r6, r2, #32
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[0x5f,0xea,0x22,0x86]
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# ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
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[0x5f,0xea,0x72,0x16]
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# CHECK: rors.w r6, r2, #5
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[0x5f,0xea,0x72,0x96]
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# ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding
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[0x4f,0xea,0x34,0x04]
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# CHECK: rrx r4, r4
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[0x4f,0xea,0x34,0x84]
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# CHECK: rrx r4, r4
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# ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
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