llvm-project/llvm/test/MC/Disassembler/ARM
David Spickett 3a34194606 [ARM] Fix Asm/Disasm of TBB/TBH instructions
Summary:
This fixes Bugzilla #46616 in which it was reported
that "tbb  [pc, r0]" was marked as SoftFail
(aka unpredictable) incorrectly.

Expected behaviour is:
* ARMv8 is required to use sp as rn or rm
  (tbb/tbh only have a Thumb encoding so using Arm mode
  is not an option)
* If rm is the pc then the instruction is always
  unpredictable

Some of this was implemented already and this fixes the
rest. Added tests cover the new and pre-existing handling.

Reviewers: ostannard

Reviewed By: ostannard

Subscribers: kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D84227
2020-07-22 09:31:56 +01:00
..
addrmode2-reencoding.txt
arm-LDREXD-reencoding.txt
arm-STREXD-reencoding.txt
arm-tests.txt
arm-thumb-trustzone.txt
arm-trustzone.txt
arm-vmrs_vmsr.txt
armv8.1a.txt
armv8.2a-dotprod-a32.s
armv8.2a-dotprod-t32.s
armv8.3a-js-arm.txt
armv8.3a-js-thumb.txt
armv8.4a-trace-a32.txt
armv8.4a-trace-t32.txt
armv8.5a-sb-thumb.txt
armv8.5a-sb.txt
armv8.6a-matmul-arm.txt [AArch32] Armv8.6a Matrix Mul Assembly Parsing Support 2020-04-24 15:54:06 +01:00
armv8.6a-matmul-thumb.txt [AArch32] Armv8.6a Matrix Mul Assembly Parsing Support 2020-04-24 15:54:06 +01:00
armv8a-fpmul-a32.txt
armv8a-fpmul-t32.txt
basic-arm-instructions-v8.txt
basic-arm-instructions.txt
bfloat16-a32_1.txt [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support 2020-03-26 09:17:20 +00:00
bfloat16-a32_2.txt [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support 2020-03-26 09:17:20 +00:00
bfloat16-t32.txt [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support 2020-03-26 09:17:20 +00:00
bfloat16-t32_errors.txt [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support 2020-03-26 09:17:20 +00:00
cde-fp-vec.txt [ARM] Add initial support for Custom Datapath Extension (CDE) 2020-02-17 15:39:16 +00:00
cde-integer.txt [ARM] Add initial support for Custom Datapath Extension (CDE) 2020-02-17 15:39:16 +00:00
cde-vec-pred.txt [ARM] Add initial support for Custom Datapath Extension (CDE) 2020-02-17 15:39:16 +00:00
clrm.txt [ARM] Correct syntax of the CLRM insn 2020-02-05 13:54:34 +00:00
coprocessors-arm.txt [ARM] Make coprocessor number restrictions consistent. 2019-06-27 12:40:55 +00:00
coprocessors-thumb.txt [ARM] Make coprocessor number restrictions consistent. 2019-06-27 12:40:55 +00:00
crc32-thumb.txt
crc32.txt
csdb-arm.txt
csdb-thumb.txt
d16.txt
dfb-arm.txt
dfb-thumb.txt
fp-armv8.txt
fp-encoding.txt
fullfp16-arm-neg.txt
fullfp16-arm-nopred.txt
fullfp16-arm.txt
fullfp16-neon-arm-neg.txt
fullfp16-neon-arm.txt
fullfp16-neon-thumb-neg.txt
fullfp16-neon-thumb.txt
fullfp16-thumb-neg.txt
fullfp16-thumb-nopred.txt
fullfp16-thumb.txt
hex-immediates.txt
invalid-FSTMX-arm.txt
invalid-IT-CC15.txt
invalid-armv7.txt [ARM] Remove condition that could never be true 2020-04-07 09:50:56 +01:00
invalid-armv8.1a.txt
invalid-armv8.txt
invalid-because-armv7.txt
invalid-thumb-MSR-MClass.txt
invalid-thumbv7-xfail.txt
invalid-thumbv7.txt [ARM][Thumb2] Fix ADD/SUB invalid writes to SP 2020-01-14 11:47:19 +00:00
invalid-thumbv8.1a.txt
invalid-thumbv8.txt
invalid-virtexts.arm.txt
ldrd-armv4.txt
lit.local.cfg [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
load-store-acquire-release-v8-thumb.txt
load-store-acquire-release-v8.txt
marked-up-thumb.txt
memory-arm-instructions.txt
move-banked-regs-arm.txt
move-banked-regs-thumb.txt
mve-bitops.txt [ARM] Add MVE vector bit-operations (register inputs). 2019-06-19 16:43:53 +00:00
mve-float.txt [ARM] Add a batch of MVE floating-point instructions. 2019-06-21 09:35:07 +00:00
mve-integer.txt [ARM] Add a batch of MVE integer instructions. 2019-06-20 15:16:56 +00:00
mve-interleave.txt [ARM] Add MVE interleaving load/store family. 2019-06-24 10:00:39 +00:00
mve-load-store.txt [ARM] Add MVE vector load/store instructions. 2019-06-25 11:24:18 +00:00
mve-lol.txt [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
mve-minmax.txt [ARM] Add MVE integer vector min/max instructions. 2019-06-18 15:51:46 +00:00
mve-misc.txt [ARM] Fix handling of zero offsets in LOB instructions. 2019-06-27 12:41:07 +00:00
mve-qdest-qsrc.txt [ARM] Add a batch of similarly encoded MVE instructions. 2019-06-21 12:13:59 +00:00
mve-qdest-rsrc.txt [ARM] Remove nonexistent unsigned forms of MVE VQDMLAH. 2019-07-11 09:52:15 +00:00
mve-reductions.txt [ARM] Remove some spurious MVE reduction instructions. 2019-09-09 15:17:26 +00:00
mve-scalar-shift-unpredictable.txt [ARM][MVE] Decoding of uqrshl and sqrshl accepts unpredictable encodings 2019-09-09 08:50:28 +00:00
mve-scalar-shift.txt [ARM] Add <saturate> operand to SQRSHRL and UQRSHLL 2019-07-19 09:46:28 +00:00
mve-shifts.txt [ARM] Add MVE vector shift instructions. 2019-06-18 16:19:59 +00:00
mve-vcmp.txt [ARM] Add MVE vector compare instructions. 2019-06-21 11:14:51 +00:00
mve-vmov-lane.txt [ARM] Add MVE vector bit-operations (register inputs). 2019-06-19 16:43:53 +00:00
mve-vmov-pair.txt [ARM] Add MVE 64-bit GPR <-> vector move instructions. 2019-06-21 13:17:23 +00:00
mve-vpt.txt [ARM] Set up infrastructure for MVE vector instructions. 2019-06-13 13:11:13 +00:00
neon-complex-arm.txt
neon-complex-thumb.txt
neon-crypto.txt
neon-tests.txt [ARM] VBIT/VBIF support added. 2020-07-16 11:25:53 +01:00
neon-v8.txt
neon.txt [ARM] VBIT/VBIF support added. 2020-07-16 11:25:53 +01:00
neont-VLD-reencoding.txt
neont-VST-reencoding.txt
neont2.txt [ARM] VBIT/VBIF support added. 2020-07-16 11:25:53 +01:00
ras-extension-arm.txt
ras-extension-thumb.txt [ARM] Extra MVE-related testing. 2019-06-25 11:24:42 +00:00
thumb-MSR-MClass.txt
thumb-fp-armv8.txt
thumb-neon-crypto.txt
thumb-neon-v8.txt
thumb-printf.txt
thumb-tests.txt [ARM][Thumb2] Fix ADD/SUB invalid writes to SP 2020-01-14 11:47:19 +00:00
thumb-v8.1a.txt
thumb-v8.txt
thumb-vmrs_vmsr.txt
thumb1.txt
thumb2-bit-15.txt
thumb2-diagnostic.txt [ARM] Fix Asm/Disasm of TBB/TBH instructions 2020-07-22 09:31:56 +01:00
thumb2-preloads.txt
thumb2-v8.1m.txt [ARM] Fix handling of zero offsets in LOB instructions. 2019-06-27 12:41:07 +00:00
thumb2-v8.txt [ARM][Thumb2] Fix ADD/SUB invalid writes to SP 2020-01-14 11:47:19 +00:00
thumb2-v8m.txt
thumb2.txt [ARM][Thumb2] Fix ADD/SUB invalid writes to SP 2020-01-14 11:47:19 +00:00
thumbv8.1m-vmrs-vmsr.txt [ARM] Add the non-MVE instructions in Arm v8.1-M. 2019-06-11 09:29:18 +00:00
thumbv8.1m.s [ARM] Reject CSEL instructions with invalid operands 2019-07-31 14:22:45 +00:00
unpredictable-ADC-arm.txt
unpredictable-ADDREXT3-arm.txt
unpredictable-AExtI-arm.txt
unpredictable-AI1cmp-arm.txt
unpredictable-BFI.txt
unpredictable-LDR-arm.txt
unpredictable-LDRD-arm.txt
unpredictable-LSL-regform.txt
unpredictable-MRRC2-arm.txt
unpredictable-MRS-arm.txt
unpredictable-MUL-arm.txt
unpredictable-MVN-arm.txt
unpredictable-RSC-arm.txt
unpredictable-SEL-arm.txt
unpredictable-SHADD16-arm.txt
unpredictable-SSAT-arm.txt
unpredictable-STRBrs-arm.txt
unpredictable-UQADD8-arm.txt
unpredictable-swp-arm.txt
unpredictables-thumb.txt
vfp4.txt
virtexts-arm.txt
virtexts-thumb.txt
vmrs-vmsr-invalid.txt [ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodings 2019-09-03 09:55:30 +00:00
vscclrm.txt [MC][ARM] vscclrm disassembles as vldmia 2019-09-27 08:22:24 +00:00
vstrldr_sys.txt [llvm] Fix yet more missing FileCheck colons 2020-04-13 10:49:19 -06:00