llvm-project/llvm/test/MC/AVR
Ayke van Laethem 4f6d7985d4
[AVR] Add register aliases XL, YH, etc
These aliases are sometimes used in assembly code and make the code more
readable. They are supported by avr-gcc too.

Differential Revision: https://reviews.llvm.org/D96492
2021-03-03 15:36:05 +01:00
..
out-of-range-fixups
dwarf-asm-no-code.s [Object] Change ELFObjectFile<ELFT>::getFileFormatName() to use BFD names 2020-03-16 07:42:04 -07:00
hex-immediates.s [AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex 2020-07-12 08:14:52 -07:00
inst-adc.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-add.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-adiw.s [AVR] Disassemble double register instructions 2020-06-23 02:18:04 +02:00
inst-and.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-andi.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-asr.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-bld.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-brbc.s
inst-brbs.s
inst-break.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-bst.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-call.s [AVR] Implement disassembly of 32-bit instructions 2020-06-18 11:26:58 +02:00
inst-cbi.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-cbr.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-clr.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-com.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-cp.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-cpc.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-cpi.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-cpse.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-dec.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-des.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-eicall.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-eijmp.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-elpm.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-eor.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-family-cond-branch.s
inst-family-set-clr-flag.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-fmul.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-fmuls.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-fmulsu.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-icall.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-ijmp.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-in.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-inc.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-jmp.s [AVR] Implement disassembly of 32-bit instructions 2020-06-18 11:26:58 +02:00
inst-lac.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-las.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-lat.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-ld.s
inst-ldd.s
inst-ldi.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-lds.s [AVR] Implement disassembly of 32-bit instructions 2020-06-18 11:26:58 +02:00
inst-lpm.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-lsl.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-lsr.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-mov.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-movw.s [AVR] Disassemble double register instructions 2020-06-23 02:18:04 +02:00
inst-mul.s
inst-muls.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-mulsu.s [AVR] Disassemble multiplication instructions 2020-06-23 02:17:37 +02:00
inst-neg.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-nop.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-or.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-ori.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-out.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-pop.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-push.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-rcall.s
inst-ret.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-reti.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-rjmp.s
inst-rol.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-ror.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-sbc.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-sbci.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-sbi.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-sbic.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-sbis.s [AVR] Implement disassembly support for I/O instructions 2020-06-10 20:55:47 +02:00
inst-sbiw.s [AVR] Disassemble double register instructions 2020-06-23 02:18:04 +02:00
inst-sbr.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-sbrc.s
inst-sbrs.s
inst-ser.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-sleep.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-spm.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
inst-st.s
inst-std.s
inst-sts.s [AVR] Implement disassembly of 32-bit instructions 2020-06-18 11:26:58 +02:00
inst-sub.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-subi.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-swap.s [AVR] Decode single register instructions 2020-06-23 02:17:15 +02:00
inst-tst.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-wdr.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
inst-xch.s [AVR] Disassemble instructions with fixed Z operand 2020-06-23 02:17:53 +02:00
lit.local.cfg
modifiers.s
registers.s [AVR] Add register aliases XL, YH, etc 2021-03-03 15:36:05 +01:00
relocations-abs.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
relocations.s [AVR] Fix global references to function symbols 2021-02-10 00:40:49 +13:00
symbol_relocation.s
syntax-reg-int-literal.s
syntax-reg-pair.s