forked from OSchip/llvm-project
79 lines
2.6 KiB
LLVM
79 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
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define void @t() nounwind ssp {
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; CHECK-LABEL: t:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne LBB0_6
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; CHECK-NEXT: ## %bb.1: ## %if.end.i
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: je LBB0_2
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; CHECK-NEXT: LBB0_6: ## %return
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB0_2: ## %if.end
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne LBB0_5
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; CHECK-NEXT: ## %bb.3: ## %cond.true190
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne LBB0_5
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; CHECK-NEXT: ## %bb.4: ## %cond.true225
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: LBB0_5: ## %cond.false205
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; CHECK-NEXT: ud2
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entry:
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br i1 undef, label %return, label %if.end.i
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if.end.i: ; preds = %entry
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%tmp7.i = load i32, i32* undef, align 4
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br i1 undef, label %return, label %if.end
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if.end: ; preds = %if.end.i
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%tmp138 = select i1 undef, i32 0, i32 %tmp7.i
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%tmp867 = zext i32 %tmp138 to i64
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br label %while.cond
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while.cond: ; preds = %while.body, %if.end
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%tmp869 = sub i64 %tmp867, 0
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%scale2.0 = trunc i64 %tmp869 to i32
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%cmp149 = icmp eq i32 %scale2.0, 0
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br i1 %cmp149, label %while.end, label %land.rhs
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land.rhs: ; preds = %while.cond
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br i1 undef, label %while.body, label %while.end
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while.body: ; preds = %land.rhs
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br label %while.cond
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while.end: ; preds = %land.rhs, %while.cond
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br i1 undef, label %cond.false205, label %cond.true190
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cond.true190: ; preds = %while.end
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br i1 undef, label %cond.false242, label %cond.true225
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cond.false205: ; preds = %while.end
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unreachable
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cond.true225: ; preds = %cond.true190
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br i1 undef, label %cond.false280, label %cond.true271
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cond.false242: ; preds = %cond.true190
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unreachable
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cond.true271: ; preds = %cond.true225
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unreachable
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cond.false280: ; preds = %cond.true225
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unreachable
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return: ; preds = %if.end.i, %entry
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ret void
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}
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