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llvm-project/llvm/test/MC/Hexagon
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Colin LeMahieu ecef1d9cbc [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding. 
The usual way to get a 32-bit relocation is to use a constant extender which doubles the size of the instruction, 4 bytes to 8 bytes.

Another way is to put a .word32 and mix code and data within a function.  The disadvantage is it's not a valid instruction encoding and jumping over it causes prefetch stalls inside the hardware.

This relocation packs a 23-bit value in to an "r0 = add(rX, #a)" instruction by overwriting the source register bits.  Since r0 is the return value register, if this instruction is placed after a function call which return void, r0 will be filled with an undefined value, the prefetch won't be confused, and the callee can access the constant value by way of the link register.

llvm-svn: 261006
 		2016-02-16 20:38:17 +00:00
..
instructions [Hexagon] Fixing compound register printing and reenabling more tests. 2015-11-10 00:51:56 +00:00
asmMap.s [Hexagon] Adding instruction aliases and tests. 2015-11-10 01:58:26 +00:00
basic.ll [llvm-readobj] Option to emit readelf like output 2016-02-10 20:40:55 +00:00
capitalizedEndloop.s [Hexagon] NFC. Adding a number of packet correctness tests. 2015-11-13 01:46:06 +00:00
dcfetch.s [Hexagon] NFC. Adding a number of packet correctness tests. 2015-11-13 01:46:06 +00:00
empty_asm.s [Hexagon] NFC. Adding a number of packet correctness tests. 2015-11-13 01:46:06 +00:00
endloop.s [Hexagon] NFC. Adding a number of packet correctness tests. 2015-11-13 01:46:06 +00:00
got.s [Hexagon] Add PIC support 2015-12-18 20:19:30 +00:00
iconst.s [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding. 2016-02-16 20:38:17 +00:00
inst_add.ll [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 2015-06-05 16:00:11 +00:00
inst_add64.ll
…
inst_and.ll
…
inst_and64.ll [Hexagon] Split double registers 2015-10-16 20:38:54 +00:00
inst_aslh.ll
…
inst_asrh.ll
…
inst_cmp_eq.ll [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
inst_cmp_eqi.ll [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
inst_cmp_gt.ll [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
inst_cmp_gti.ll [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
inst_cmp_lt.ll [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
inst_cmp_ugt.ll [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
inst_cmp_ugti.ll [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
inst_cmp_ult.ll [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 2015-05-29 14:44:13 +00:00
inst_or.ll
…
inst_or64.ll [Hexagon] Split double registers 2015-10-16 20:38:54 +00:00
inst_select.ll [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 2015-06-05 16:00:11 +00:00
inst_sub.ll
…
inst_sub64.ll
…
inst_sxtb.ll [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 2015-06-05 16:00:11 +00:00
inst_sxth.ll [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 2015-06-05 16:00:11 +00:00
inst_xor.ll
…
inst_xor64.ll [Hexagon] Split double registers 2015-10-16 20:38:54 +00:00
inst_zxtb.ll [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 2015-06-05 16:00:11 +00:00
inst_zxth.ll [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 2015-06-05 16:00:11 +00:00
jumpdoublepound.s [Hexagon] Adding relaxation functionality to backend and test. 2015-11-13 01:12:25 +00:00
labels.s [Hexagon] Adding test to make sure labels and register pairs are correctly parsed. 2015-11-12 22:54:14 +00:00
lit.local.cfg
…
new-value-check.s [Hexagon] Adding checks for values out of operand range and correct new-value producer usage. 2015-11-12 23:28:01 +00:00
out_of_range.s [Hexagon] Adding checks for values out of operand range and correct new-value producer usage. 2015-11-12 23:28:01 +00:00
pcrel.s [Hexagon] Add PIC support 2015-12-18 20:19:30 +00:00
relaxed_newvalue.s [Hexagon] NFC. Adding a number of packet correctness tests. 2015-11-13 01:46:06 +00:00
relocations.s [Hexagon] Fixing relocation generation and adding tests. 2016-02-09 19:18:02 +00:00
test.s Fix several accidental DOS line endings in source files 2016-01-03 17:22:03 +00:00
two_ext.s [Hexagon] Adding relaxation functionality to backend and test. 2015-11-13 01:12:25 +00:00
v60-alu.s [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 2015-12-03 21:44:28 +00:00
v60-permute.s [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 2015-12-03 21:44:28 +00:00
v60-shift.s [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 2015-12-03 21:44:28 +00:00
v60-vcmp.s [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 2015-12-03 21:44:28 +00:00
v60-vmem.s [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 2015-12-03 21:44:28 +00:00
v60-vmpy-acc.s [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 2015-12-03 21:44:28 +00:00
v60-vmpy1.s [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 2015-12-03 21:44:28 +00:00
v60lookup.s [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 2015-12-03 21:44:28 +00:00