Zlatko Buljan f034021443 [mips][microMIPS] Implement TLBINV and TLBINVF instructions ... Differential Revision: http://reviews.llvm.org/D16849 llvm-svn: 261211		2016-02-18 14:10:52 +00:00
..
AArch64	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
AMDGPU	[AMDGPU] Disassembler: Added basic disassembler for AMDGPU target	2016-02-18 03:42:32 +00:00
ARM	[ARM] Add new system registers to ARMv8-M Baseline/Mainline	2016-01-25 11:25:36 +00:00
Hexagon	[Hexagon] Fixing store instructions and reenabling a few more tests.	2015-11-10 00:22:00 +00:00
Mips	[mips][microMIPS] Implement TLBINV and TLBINVF instructions	2016-02-18 14:10:52 +00:00
PowerPC	[PowerPC] Replace cntlz[.] with cntlzw[.]	2015-10-28 03:26:45 +00:00
Sparc	[Sparc] Implement i64 load/store support for 32-bit sparc.	2015-08-10 19:11:39 +00:00
SystemZ	[SystemZ] Add assembly instructions for obtaining clock values as well as CPU features	2015-10-01 14:43:48 +00:00
X86	[AVX-512] Fix test case update missed in r257299.	2016-01-11 00:56:48 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00