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llvm-project/llvm/lib/Target/R600
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David Majnemer 1ccd2f2aee MC: Remove vestigial PCSymbol field from AsmInfo 
llvm-svn: 191362
 		2013-09-25 09:36:11 +00:00
..
InstPrinter R600: Bank Swizzle now display SCL equivalent 2013-06-29 19:32:29 +00:00
MCTargetDesc MC: Remove vestigial PCSymbol field from AsmInfo 2013-09-25 09:36:11 +00:00
TargetInfo R600: Remove unnecessary include 2013-06-07 20:28:43 +00:00
AMDGPU.h R600/SI: Convert v16i8 resource descriptors to i128 2013-08-14 23:24:45 +00:00
AMDGPU.td R600: Rework subtarget info and remove AMDILDevice classes 2013-06-07 20:37:48 +00:00
AMDGPUAsmPrinter.cpp R600/SI: Initial local memory support 2013-07-10 16:37:07 +00:00
AMDGPUAsmPrinter.h R600: Emit used GPRs count 2013-04-17 15:17:25 +00:00
AMDGPUCallingConv.td R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback 2013-09-12 02:55:14 +00:00
AMDGPUConvertToISA.cpp
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AMDGPUFrameLowering.cpp R600: Fix calculation of stack offset in AMDGPUFrameLowering 2013-06-07 20:52:05 +00:00
AMDGPUFrameLowering.h R600: Support for indirect addressing v4 2013-02-06 17:32:29 +00:00
AMDGPUISelDAGToDAG.cpp ISelDAG: spot chain cycles involving MachineNodes 2013-09-22 08:21:56 +00:00
AMDGPUISelLowering.cpp R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback 2013-09-12 02:55:14 +00:00
AMDGPUISelLowering.h R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback 2013-09-12 02:55:14 +00:00
AMDGPUIndirectAddressing.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 20:28:55 +00:00
AMDGPUInstrInfo.cpp R600: Use new getNamedOperandIdx function generated by TableGen 2013-06-25 21:22:18 +00:00
AMDGPUInstrInfo.h R600: Use new getNamedOperandIdx function generated by TableGen 2013-06-25 21:22:18 +00:00
AMDGPUInstrInfo.td R600: Add support for i8 and i16 local memory stores 2013-08-26 15:05:49 +00:00
AMDGPUInstructions.td R600: Add support for LDS atomic subtract 2013-09-06 20:17:42 +00:00
AMDGPUIntrinsics.td R600: Add support for GROUP_BARRIER instruction 2013-06-28 15:46:59 +00:00
AMDGPUMCInstLower.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
AMDGPUMCInstLower.h R600: BB operand support for SI 2012-12-17 15:14:54 +00:00
AMDGPUMachineFunction.cpp Move string pointer from being a static class member to just a static global in the one file its needed in. 2013-07-17 00:31:35 +00:00
AMDGPUMachineFunction.h R600: Fix incorrect LDS size calculation 2013-09-05 18:37:57 +00:00
AMDGPURegisterInfo.cpp R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 2013-08-14 23:24:32 +00:00
AMDGPURegisterInfo.h R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 2013-08-14 23:24:32 +00:00
AMDGPURegisterInfo.td Make SubRegIndex size mandatory, following r183020. 2013-05-31 23:45:26 +00:00
AMDGPUSubtarget.cpp SelectionDAG: Use correct pointer size when lowering function arguments v2 2013-08-26 15:05:36 +00:00
AMDGPUSubtarget.h Allow subtarget selection of the default MachineScheduler and document the interface. 2013-09-20 05:14:41 +00:00
AMDGPUTargetMachine.cpp Allow subtarget selection of the default MachineScheduler and document the interface. 2013-09-20 05:14:41 +00:00
AMDGPUTargetMachine.h SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions 2013-07-27 00:01:07 +00:00
AMDGPUTargetTransformInfo.cpp SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions 2013-07-27 00:01:07 +00:00
AMDILBase.td R600: Move Subtarget feature definitions into AMDGPU.td 2013-06-07 20:28:49 +00:00
AMDILCFGStructurizer.cpp Add llvm namespace to llvm::next. 2013-09-04 04:26:09 +00:00
AMDILISelLowering.cpp Make some arrays 'static const' 2013-07-15 06:39:13 +00:00
AMDILInstrInfo.td R600: Rework subtarget info and remove AMDILDevice classes 2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.cpp R600: Rework subtarget info and remove AMDILDevice classes 2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.h Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
AMDILIntrinsics.td R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
AMDILRegisterInfo.td
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CMakeLists.txt R600/SI: Convert v16i8 resource descriptors to i128 2013-08-14 23:24:45 +00:00
LLVMBuild.txt
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Makefile
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Processors.td Add a newline. 2013-07-01 21:31:10 +00:00
R600ControlFlowFinalizer.cpp R600: Add IsExport bit to TableGen instruction definitions 2013-08-16 01:11:51 +00:00
R600Defines.h R600: Add support for i8 and i16 local memory stores 2013-08-26 15:05:49 +00:00
R600EmitClauseMarkers.cpp Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size. 2013-07-14 04:42:23 +00:00
R600ExpandSpecialInstrs.cpp R600: Remove predicated_break inst 2013-07-31 19:31:14 +00:00
R600ISelLowering.cpp R600: Move clamp handling code to R600IselLowering.cpp 2013-09-12 23:45:00 +00:00
R600ISelLowering.h R600: Move fabs/fneg/sel folding logic into PostProcessIsel 2013-09-12 23:44:44 +00:00
R600InstrFormats.td R600: Use SchedModel enum for is{Trans,Vector}Only functions 2013-09-04 19:53:30 +00:00
R600InstrInfo.cpp R600: Don't use trans slot for instructions that read LDS source registers 2013-09-12 02:55:06 +00:00
R600InstrInfo.h R600: Don't use trans slot for instructions that read LDS source registers 2013-09-12 02:55:06 +00:00
R600Instructions.td R600: Add support for LDS atomic subtract 2013-09-06 20:17:42 +00:00
R600Intrinsics.td R600: Improve texture handling 2013-05-17 16:50:20 +00:00
R600MachineFunctionInfo.cpp R600/SI: Share code recording ShaderTypeAttribute between generations 2013-04-01 21:47:53 +00:00
R600MachineFunctionInfo.h Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 2013-05-23 17:10:37 +00:00
R600MachineScheduler.cpp R600: Don't use trans slot for instructions that read LDS source registers 2013-09-12 02:55:06 +00:00
R600MachineScheduler.h R600: Non vector only instruction can be scheduled on trans unit 2013-09-04 19:53:46 +00:00
R600OptimizeVectorRegisters.cpp R600: Enable folding of inline literals into REQ_SEQUENCE instructions 2013-08-16 01:11:55 +00:00
R600Packetizer.cpp R600: Don't use trans slot for instructions that read LDS source registers 2013-09-12 02:55:06 +00:00
R600RegisterInfo.cpp R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 2013-08-14 23:24:32 +00:00
R600RegisterInfo.h R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 2013-08-14 23:24:32 +00:00
R600RegisterInfo.td R600: Don't use trans slot for instructions that read LDS source registers 2013-09-12 02:55:06 +00:00
R600Schedule.td R600: Add local memory support via LDS 2013-06-28 15:47:08 +00:00
R600TextureIntrinsicsReplacer.cpp R600: Coding style 2013-09-05 23:55:13 +00:00
SIAnnotateControlFlow.cpp Add 'const' qualifiers to static const char* variables. 2013-07-16 01:17:10 +00:00
SIDefines.h R600/SI: Fix broken encoding of DS_WRITE_B32 2013-08-16 16:19:24 +00:00
SIFixSGPRCopies.cpp R600/SI: Fix another case of illegal VGPR to SGPR copy 2013-08-22 20:21:02 +00:00
SIISelLowering.cpp R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback 2013-09-12 02:55:14 +00:00
SIISelLowering.h R600/SI: Improve legalization of vector operations 2013-08-14 23:25:00 +00:00
SIInsertWaits.cpp R600/SI: Fix broken encoding of DS_WRITE_B32 2013-08-16 16:19:24 +00:00
SIInstrFormats.td R600/SI: Fix broken encoding of DS_WRITE_B32 2013-08-16 16:19:24 +00:00
SIInstrInfo.cpp Remove unused stdio.h includes 2013-08-18 08:29:51 +00:00
SIInstrInfo.h R600/SI: Fix broken encoding of DS_WRITE_B32 2013-08-16 16:19:24 +00:00
SIInstrInfo.td R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback 2013-09-12 02:55:14 +00:00
SIInstructions.td R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback 2013-09-12 02:55:14 +00:00
SIIntrinsics.td R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback 2013-09-12 02:55:14 +00:00
SILowerControlFlow.cpp R600: Add support for local memory atomic add 2013-09-05 18:38:09 +00:00
SIMachineFunctionInfo.cpp R600/SI: Share code recording ShaderTypeAttribute between generations 2013-04-01 21:47:53 +00:00
SIMachineFunctionInfo.h R600/SI: Share code recording ShaderTypeAttribute between generations 2013-04-01 21:47:53 +00:00
SIRegisterInfo.cpp R600/SI: Choose the correct MOV instruction for copying immediates 2013-08-14 23:24:24 +00:00
SIRegisterInfo.h R600/SI: Choose the correct MOV instruction for copying immediates 2013-08-14 23:24:24 +00:00
SIRegisterInfo.td R600/SI: Convert v16i8 resource descriptors to i128 2013-08-14 23:24:45 +00:00
SISchedule.td
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SITypeRewriter.cpp R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics 2013-08-14 23:24:53 +00:00