forked from OSchip/llvm-project
736 lines
22 KiB
YAML
736 lines
22 KiB
YAML
# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-optimize-exec-masking -o - %s | FileCheck %s
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--- |
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target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
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define amdgpu_kernel void @optimize_if_and_saveexec_xor(i32 %z, i32 %v) #0 {
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main_body:
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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%cc = icmp eq i32 %id, 0
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%0 = call { i1, i64 } @llvm.amdgcn.if(i1 %cc)
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%1 = extractvalue { i1, i64 } %0, 0
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%2 = extractvalue { i1, i64 } %0, 1
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br i1 %1, label %if, label %end
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if: ; preds = %main_body
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%v.if = load volatile i32, i32 addrspace(1)* undef
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br label %end
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end: ; preds = %if, %main_body
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%r = phi i32 [ 4, %main_body ], [ %v.if, %if ]
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call void @llvm.amdgcn.end.cf(i64 %2)
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store i32 %r, i32 addrspace(1)* undef
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ret void
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}
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define amdgpu_kernel void @optimize_if_and_saveexec(i32 %z, i32 %v) #0 {
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main_body:
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br i1 undef, label %if, label %end
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if:
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br label %end
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end:
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ret void
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}
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define amdgpu_kernel void @optimize_if_or_saveexec(i32 %z, i32 %v) #0 {
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main_body:
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br i1 undef, label %if, label %end
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if:
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br label %end
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end:
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ret void
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}
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define amdgpu_kernel void @optimize_if_and_saveexec_xor_valu_middle(i32 %z, i32 %v) #0 {
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main_body:
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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%cc = icmp eq i32 %id, 0
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%0 = call { i1, i64 } @llvm.amdgcn.if(i1 %cc)
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%1 = extractvalue { i1, i64 } %0, 0
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%2 = extractvalue { i1, i64 } %0, 1
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store i32 %id, i32 addrspace(1)* undef
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br i1 %1, label %if, label %end
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if: ; preds = %main_body
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%v.if = load volatile i32, i32 addrspace(1)* undef
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br label %end
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end: ; preds = %if, %main_body
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%r = phi i32 [ 4, %main_body ], [ %v.if, %if ]
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call void @llvm.amdgcn.end.cf(i64 %2)
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store i32 %r, i32 addrspace(1)* undef
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ret void
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}
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define amdgpu_kernel void @optimize_if_and_saveexec_xor_wrong_reg(i32 %z, i32 %v) #0 {
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main_body:
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br i1 undef, label %if, label %end
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if:
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br label %end
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end:
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ret void
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}
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define amdgpu_kernel void @optimize_if_and_saveexec_xor_modify_copy_to_exec(i32 %z, i32 %v) #0 {
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main_body:
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br i1 undef, label %if, label %end
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if:
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br label %end
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end:
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ret void
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}
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define amdgpu_kernel void @optimize_if_and_saveexec_xor_live_out_setexec(i32 %z, i32 %v) #0 {
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main_body:
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br i1 undef, label %if, label %end
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if:
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br label %end
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end:
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ret void
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}
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define amdgpu_kernel void @optimize_if_unknown_saveexec(i32 %z, i32 %v) #0 {
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main_body:
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br i1 undef, label %if, label %end
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if:
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br label %end
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end:
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ret void
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}
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define amdgpu_kernel void @optimize_if_andn2_saveexec(i32 %z, i32 %v) #0 {
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main_body:
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br i1 undef, label %if, label %end
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if:
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br label %end
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end:
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ret void
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}
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define amdgpu_kernel void @optimize_if_andn2_saveexec_no_commute(i32 %z, i32 %v) #0 {
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main_body:
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br i1 undef, label %if, label %end
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if:
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br label %end
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end:
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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declare { i1, i64 } @llvm.amdgcn.if(i1)
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declare void @llvm.amdgcn.end.cf(i64)
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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...
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---
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# CHECK-LABEL: name: optimize_if_and_saveexec_xor{{$}}
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# CHECK: $sgpr0_sgpr1 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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# CHECK-NEXT: $sgpr0_sgpr1 = S_XOR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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# CHECK-NEXT: SI_MASK_BRANCH
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name: optimize_if_and_saveexec_xor
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.main_body:
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liveins: $vgpr0
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$sgpr0_sgpr1 = COPY $exec
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$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 4, implicit $exec
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$sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
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$sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
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$exec = S_MOV_B64_term killed $sgpr2_sgpr3
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SI_MASK_BRANCH %bb.2, implicit $exec
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S_BRANCH %bb.1
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bb.1.if:
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liveins: $sgpr0_sgpr1
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$sgpr7 = S_MOV_B32 61440
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$sgpr6 = S_MOV_B32 -1
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$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
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bb.2.end:
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liveins: $vgpr0, $sgpr0_sgpr1
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$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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$sgpr3 = S_MOV_B32 61440
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$sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
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S_ENDPGM
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...
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---
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# CHECK-LABEL: name: optimize_if_and_saveexec{{$}}
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# CHECK: $sgpr0_sgpr1 = S_AND_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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# CHECK-NEXT: SI_MASK_BRANCH
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name: optimize_if_and_saveexec
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.main_body:
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liveins: $vgpr0
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$sgpr0_sgpr1 = COPY $exec
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$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 4, implicit $exec
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$sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
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$exec = S_MOV_B64_term killed $sgpr2_sgpr3
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SI_MASK_BRANCH %bb.2, implicit $exec
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S_BRANCH %bb.1
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bb.1.if:
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liveins: $sgpr0_sgpr1
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$sgpr7 = S_MOV_B32 61440
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$sgpr6 = S_MOV_B32 -1
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$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
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bb.2.end:
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liveins: $vgpr0, $sgpr0_sgpr1
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$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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$sgpr3 = S_MOV_B32 61440
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$sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
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S_ENDPGM
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...
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---
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# CHECK-LABEL: name: optimize_if_or_saveexec{{$}}
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# CHECK: $sgpr0_sgpr1 = S_OR_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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# CHECK-NEXT: SI_MASK_BRANCH
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name: optimize_if_or_saveexec
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.main_body:
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liveins: $vgpr0
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$sgpr0_sgpr1 = COPY $exec
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$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 4, implicit $exec
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$sgpr2_sgpr3 = S_OR_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
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$exec = S_MOV_B64_term killed $sgpr2_sgpr3
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SI_MASK_BRANCH %bb.2, implicit $exec
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S_BRANCH %bb.1
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bb.1.if:
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liveins: $sgpr0_sgpr1
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$sgpr7 = S_MOV_B32 61440
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$sgpr6 = S_MOV_B32 -1
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$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
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bb.2.end:
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liveins: $vgpr0, $sgpr0_sgpr1
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$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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$sgpr3 = S_MOV_B32 61440
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$sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
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S_ENDPGM
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...
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---
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# CHECK-LABEL: name: optimize_if_and_saveexec_xor_valu_middle
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# CHECK: $sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
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# CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
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# CHECK-NEXT: $sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
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# CHECK-NEXT: $exec = COPY killed $sgpr2_sgpr3
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# CHECK-NEXT: SI_MASK_BRANCH
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name: optimize_if_and_saveexec_xor_valu_middle
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.main_body:
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liveins: $vgpr0
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$sgpr0_sgpr1 = COPY $exec
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$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 4, implicit $exec
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$sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
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BUFFER_STORE_DWORD_OFFSET $vgpr0, undef $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
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$sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
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$exec = S_MOV_B64_term killed $sgpr2_sgpr3
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SI_MASK_BRANCH %bb.2, implicit $exec
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S_BRANCH %bb.1
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bb.1.if:
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liveins: $sgpr0_sgpr1
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$sgpr7 = S_MOV_B32 61440
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$sgpr6 = S_MOV_B32 -1
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$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
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bb.2.end:
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liveins: $vgpr0, $sgpr0_sgpr1
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$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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$sgpr3 = S_MOV_B32 61440
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$sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
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S_ENDPGM
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...
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---
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# CHECK-LABEL: name: optimize_if_and_saveexec_xor_wrong_reg{{$}}
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# CHECK: $sgpr0_sgpr1 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
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# CHECK-NEXT: $sgpr0_sgpr1 = S_XOR_B64 undef $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
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# CHECK-NEXT: $exec = COPY $sgpr0_sgpr1
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# CHECK-NEXT: SI_MASK_BRANCH %bb.2, implicit $exec
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name: optimize_if_and_saveexec_xor_wrong_reg
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.main_body:
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liveins: $vgpr0
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$sgpr6 = S_MOV_B32 -1
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$sgpr7 = S_MOV_B32 61440
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$sgpr0_sgpr1 = COPY $exec
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$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 4, implicit $exec
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$sgpr0_sgpr1 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
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$sgpr0_sgpr1 = S_XOR_B64 undef $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
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$exec = S_MOV_B64_term $sgpr0_sgpr1
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SI_MASK_BRANCH %bb.2, implicit $exec
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S_BRANCH %bb.1
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bb.1.if:
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liveins: $sgpr0_sgpr1 , $sgpr4_sgpr5_sgpr6_sgpr7
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$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
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bb.2.end:
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liveins: $vgpr0, $sgpr0_sgpr1, $sgpr4_sgpr5_sgpr6_sgpr7
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$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
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$sgpr3 = S_MOV_B32 61440
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$sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
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S_ENDPGM
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...
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---
|
|
# CHECK-LABEL: name: optimize_if_and_saveexec_xor_modify_copy_to_exec{{$}}
|
|
# CHECK: $sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
|
|
# CHECK-NEXT: $sgpr2_sgpr3 = S_OR_B64 killed $sgpr2_sgpr3, 1, implicit-def $scc
|
|
# CHECK-NEXT: $sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
|
|
# CHECK-NEXT: $exec = COPY killed $sgpr2_sgpr3
|
|
# CHECK-NEXT: SI_MASK_BRANCH %bb.2, implicit $exec
|
|
|
|
name: optimize_if_and_saveexec_xor_modify_copy_to_exec
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$vgpr0' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 0
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
maxCallFrameSize: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
body: |
|
|
bb.0.main_body:
|
|
liveins: $vgpr0
|
|
|
|
$sgpr0_sgpr1 = COPY $exec
|
|
$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
|
|
$vgpr0 = V_MOV_B32_e32 4, implicit $exec
|
|
$sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
|
|
$sgpr2_sgpr3 = S_OR_B64 killed $sgpr2_sgpr3, 1, implicit-def $scc
|
|
$sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
|
|
$exec = S_MOV_B64_term killed $sgpr2_sgpr3
|
|
SI_MASK_BRANCH %bb.2, implicit $exec
|
|
S_BRANCH %bb.1
|
|
|
|
bb.1.if:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
$sgpr7 = S_MOV_B32 61440
|
|
$sgpr6 = S_MOV_B32 -1
|
|
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
|
|
|
bb.2.end:
|
|
liveins: $vgpr0, $sgpr0_sgpr1
|
|
|
|
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
|
$sgpr0 = S_MOV_B32 0
|
|
$sgpr1 = S_MOV_B32 1
|
|
$sgpr2 = S_MOV_B32 -1
|
|
$sgpr3 = S_MOV_B32 61440
|
|
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
|
S_ENDPGM
|
|
|
|
...
|
|
---
|
|
# CHECK-LABEL: name: optimize_if_and_saveexec_xor_live_out_setexec{{$}}
|
|
# CHECK: $sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
|
|
# CHECK-NEXT: $sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
|
|
# CHECK-NEXT: $exec = COPY $sgpr2_sgpr3
|
|
# CHECK-NEXT: SI_MASK_BRANCH
|
|
name: optimize_if_and_saveexec_xor_live_out_setexec
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$vgpr0' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 0
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
maxCallFrameSize: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
body: |
|
|
bb.0.main_body:
|
|
liveins: $vgpr0
|
|
|
|
$sgpr0_sgpr1 = COPY $exec
|
|
$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
|
|
$vgpr0 = V_MOV_B32_e32 4, implicit $exec
|
|
$sgpr2_sgpr3 = S_AND_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
|
|
$sgpr0_sgpr1 = S_XOR_B64 $sgpr2_sgpr3, killed $sgpr0_sgpr1, implicit-def $scc
|
|
$exec = S_MOV_B64_term $sgpr2_sgpr3
|
|
SI_MASK_BRANCH %bb.2, implicit $exec
|
|
S_BRANCH %bb.1
|
|
|
|
bb.1.if:
|
|
liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
|
S_SLEEP 0, implicit $sgpr2_sgpr3
|
|
$sgpr7 = S_MOV_B32 61440
|
|
$sgpr6 = S_MOV_B32 -1
|
|
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
|
|
|
bb.2.end:
|
|
liveins: $vgpr0, $sgpr0_sgpr1
|
|
|
|
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
|
$sgpr3 = S_MOV_B32 61440
|
|
$sgpr2 = S_MOV_B32 -1
|
|
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
|
S_ENDPGM
|
|
|
|
...
|
|
|
|
# CHECK-LABEL: name: optimize_if_unknown_saveexec{{$}}
|
|
# CHECK: $sgpr0_sgpr1 = COPY $exec
|
|
# CHECK: $sgpr2_sgpr3 = S_LSHR_B64 $sgpr0_sgpr1, killed $vcc_lo, implicit-def $scc
|
|
# CHECK-NEXT: $exec = COPY killed $sgpr2_sgpr3
|
|
# CHECK-NEXT: SI_MASK_BRANCH %bb.2, implicit $exec
|
|
|
|
name: optimize_if_unknown_saveexec
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$vgpr0' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 0
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
maxCallFrameSize: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
body: |
|
|
bb.0.main_body:
|
|
liveins: $vgpr0
|
|
|
|
$sgpr0_sgpr1 = COPY $exec
|
|
$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
|
|
$vgpr0 = V_MOV_B32_e32 4, implicit $exec
|
|
$sgpr2_sgpr3 = S_LSHR_B64 $sgpr0_sgpr1, killed $vcc_lo, implicit-def $scc
|
|
$exec = S_MOV_B64_term killed $sgpr2_sgpr3
|
|
SI_MASK_BRANCH %bb.2, implicit $exec
|
|
S_BRANCH %bb.1
|
|
|
|
bb.1.if:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
$sgpr7 = S_MOV_B32 61440
|
|
$sgpr6 = S_MOV_B32 -1
|
|
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
|
|
|
bb.2.end:
|
|
liveins: $vgpr0, $sgpr0_sgpr1
|
|
|
|
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
|
$sgpr3 = S_MOV_B32 61440
|
|
$sgpr2 = S_MOV_B32 -1
|
|
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
|
S_ENDPGM
|
|
|
|
...
|
|
---
|
|
# CHECK-LABEL: name: optimize_if_andn2_saveexec{{$}}
|
|
# CHECK: $sgpr0_sgpr1 = S_ANDN2_SAVEEXEC_B64 $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
|
|
# CHECK-NEXT: SI_MASK_BRANCH
|
|
|
|
name: optimize_if_andn2_saveexec
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$vgpr0' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 0
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
maxCallFrameSize: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
body: |
|
|
bb.0.main_body:
|
|
liveins: $vgpr0
|
|
|
|
$sgpr0_sgpr1 = COPY $exec
|
|
$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
|
|
$vgpr0 = V_MOV_B32_e32 4, implicit $exec
|
|
$sgpr2_sgpr3 = S_ANDN2_B64 $sgpr0_sgpr1, killed $vcc, implicit-def $scc
|
|
$exec = S_MOV_B64_term killed $sgpr2_sgpr3
|
|
SI_MASK_BRANCH %bb.2, implicit $exec
|
|
S_BRANCH %bb.1
|
|
|
|
bb.1.if:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
$sgpr7 = S_MOV_B32 61440
|
|
$sgpr6 = S_MOV_B32 -1
|
|
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
|
|
|
bb.2.end:
|
|
liveins: $vgpr0, $sgpr0_sgpr1
|
|
|
|
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
|
$sgpr3 = S_MOV_B32 61440
|
|
$sgpr2 = S_MOV_B32 -1
|
|
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
|
S_ENDPGM
|
|
|
|
...
|
|
---
|
|
# CHECK-LABEL: name: optimize_if_andn2_saveexec_no_commute{{$}}
|
|
# CHECK: $sgpr2_sgpr3 = S_ANDN2_B64 killed $vcc, $sgpr0_sgpr1, implicit-def $scc
|
|
# CHECK-NEXT: $exec = COPY killed $sgpr2_sgpr3
|
|
# CHECK-NEXT: SI_MASK_BRANCH %bb.2, implicit $exec
|
|
name: optimize_if_andn2_saveexec_no_commute
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$vgpr0' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 0
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
maxCallFrameSize: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
body: |
|
|
bb.0.main_body:
|
|
liveins: $vgpr0
|
|
|
|
$sgpr0_sgpr1 = COPY $exec
|
|
$vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec
|
|
$vgpr0 = V_MOV_B32_e32 4, implicit $exec
|
|
$sgpr2_sgpr3 = S_ANDN2_B64 killed $vcc, $sgpr0_sgpr1, implicit-def $scc
|
|
$exec = S_MOV_B64_term killed $sgpr2_sgpr3
|
|
SI_MASK_BRANCH %bb.2, implicit $exec
|
|
S_BRANCH %bb.1
|
|
|
|
bb.1.if:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
$sgpr7 = S_MOV_B32 61440
|
|
$sgpr6 = S_MOV_B32 -1
|
|
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `i32 addrspace(1)* undef`)
|
|
|
|
bb.2.end:
|
|
liveins: $vgpr0, $sgpr0_sgpr1
|
|
|
|
$exec = S_OR_B64 $exec, killed $sgpr0_sgpr1, implicit-def $scc
|
|
$sgpr3 = S_MOV_B32 61440
|
|
$sgpr2 = S_MOV_B32 -1
|
|
BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into `i32 addrspace(1)* undef`)
|
|
S_ENDPGM
|
|
|
|
...
|