forked from OSchip/llvm-project
188 lines
6.4 KiB
LLVM
188 lines
6.4 KiB
LLVM
; RUN: opt -vector-library=SVML -loop-vectorize -S < %s | FileCheck %s
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; Test to verify that when math headers are built with
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; __FINITE_MATH_ONLY__ enabled, causing use of __<func>_finite
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; function versions, vectorization can map these to vector versions.
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare float @__expf_finite(float) #0
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; CHECK-LABEL: @exp_f32
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; CHECK: <4 x float> @__svml_expf4
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; CHECK: ret
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define void @exp_f32(float* nocapture %varray) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call fast float @__expf_finite(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
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store float %call, float* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !1
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for.end: ; preds = %for.body
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ret void
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}
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.loop.vectorize.width", i32 4}
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!3 = !{!"llvm.loop.vectorize.enable", i1 true}
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declare double @__exp_finite(double) #0
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; CHECK-LABEL: @exp_f64
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; CHECK: <4 x double> @__svml_exp4
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; CHECK: ret
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define void @exp_f64(double* nocapture %varray) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call fast double @__exp_finite(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %indvars.iv
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store double %call, double* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !11
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for.end: ; preds = %for.body
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ret void
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}
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!11 = distinct !{!11, !12, !13}
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!12 = !{!"llvm.loop.vectorize.width", i32 4}
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!13 = !{!"llvm.loop.vectorize.enable", i1 true}
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declare float @__logf_finite(float) #0
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; CHECK-LABEL: @log_f32
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; CHECK: <4 x float> @__svml_logf4
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; CHECK: ret
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define void @log_f32(float* nocapture %varray) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to float
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%call = tail call fast float @__logf_finite(float %conv)
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%arrayidx = getelementptr inbounds float, float* %varray, i64 %indvars.iv
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store float %call, float* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !21
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for.end: ; preds = %for.body
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ret void
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}
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!21 = distinct !{!21, !22, !23}
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!22 = !{!"llvm.loop.vectorize.width", i32 4}
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!23 = !{!"llvm.loop.vectorize.enable", i1 true}
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declare double @__log_finite(double) #0
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; CHECK-LABEL: @log_f64
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; CHECK: <4 x double> @__svml_log4
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; CHECK: ret
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define void @log_f64(double* nocapture %varray) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to double
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%call = tail call fast double @__log_finite(double %conv)
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%arrayidx = getelementptr inbounds double, double* %varray, i64 %indvars.iv
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store double %call, double* %arrayidx, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !31
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for.end: ; preds = %for.body
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ret void
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}
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!31 = distinct !{!31, !32, !33}
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!32 = !{!"llvm.loop.vectorize.width", i32 4}
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!33 = !{!"llvm.loop.vectorize.enable", i1 true}
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declare float @__powf_finite(float, float) #0
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; CHECK-LABEL: @pow_f32
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; CHECK: <4 x float> @__svml_powf4
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; CHECK: ret
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define void @pow_f32(float* nocapture %varray, float* nocapture readonly %exp) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to float
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%arrayidx = getelementptr inbounds float, float* %exp, i64 %indvars.iv
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%tmp1 = load float, float* %arrayidx, align 4
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%tmp2 = tail call fast float @__powf_finite(float %conv, float %tmp1)
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%arrayidx2 = getelementptr inbounds float, float* %varray, i64 %indvars.iv
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store float %tmp2, float* %arrayidx2, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !41
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for.end: ; preds = %for.body
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ret void
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}
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!41 = distinct !{!41, !42, !43}
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!42 = !{!"llvm.loop.vectorize.width", i32 4}
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!43 = !{!"llvm.loop.vectorize.enable", i1 true}
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declare double @__pow_finite(double, double) #0
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; CHECK-LABEL: @pow_f64
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; CHECK: <4 x double> @__svml_pow4
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; CHECK: ret
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define void @pow_f64(double* nocapture %varray, double* nocapture readonly %exp) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%tmp = trunc i64 %indvars.iv to i32
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%conv = sitofp i32 %tmp to double
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%arrayidx = getelementptr inbounds double, double* %exp, i64 %indvars.iv
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%tmp1 = load double, double* %arrayidx, align 4
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%tmp2 = tail call fast double @__pow_finite(double %conv, double %tmp1)
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%arrayidx2 = getelementptr inbounds double, double* %varray, i64 %indvars.iv
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store double %tmp2, double* %arrayidx2, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1000
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !51
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for.end: ; preds = %for.body
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ret void
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}
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!51 = distinct !{!51, !52, !53}
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!52 = !{!"llvm.loop.vectorize.width", i32 4}
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!53 = !{!"llvm.loop.vectorize.enable", i1 true}
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