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llvm-project/llvm/test/CodeGen
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Sjoerd Meijer 5ea465ded7 [AArch64] Don't materialize 0 with "fmov h0, .." when FullFP16 is not supported 
We were generating "fmov h0, wzr" instructions when FullFP16 is not enabled.
I've not added any tests, because the problem was visible in:
test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll,
which I had to change: I don't think Cyclone has FullFP16 enabled
by default, so it shouldn't be using this v8.2a instruction.

I've also removed these rdar tags, please shout if there are any objections.

Differential Revision: https://reviews.llvm.org/D43020

llvm-svn: 324581
 		2018-02-08 08:39:05 +00:00
..
AArch64 [AArch64] Don't materialize 0 with "fmov h0, .." when FullFP16 is not supported 2018-02-08 08:39:05 +00:00
AMDGPU AMDGPU: Fix incorrect reordering when inline asm defines LDS address 2018-02-08 01:56:14 +00:00
ARC
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ARM [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug output 2018-02-08 05:02:00 +00:00
AVR [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug output 2018-02-08 05:02:00 +00:00
BPF bpf: Improve expanding logic in LowerSELECT_CC 2018-02-08 04:37:49 +00:00
Generic [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug output 2018-02-08 05:02:00 +00:00
Hexagon [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug output 2018-02-08 05:02:00 +00:00
Inputs
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Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MIR Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MSP430 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Mips [mips] Support 'y' operand code to print exact log2 of the operand 2018-02-07 12:36:39 +00:00
NVPTX Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Nios2 [Nios2] Arithmetic instructions for R1 and R2 ISA. 2018-01-09 11:15:08 +00:00
PowerPC [MergeICmps] Re-commit rL324317 "Enable the MergeICmps Pass by default." 2018-02-07 09:58:55 +00:00
RISCV [RISCV] Update two RISCV codegen tests after rL323991 2018-02-03 13:02:30 +00:00
SPARC [MachineCopyPropagation] Extend pass to do COPY source forwarding 2018-02-01 18:54:01 +00:00
SystemZ [SelectionDAG] Consider endianness in scalarizeVectorStore(). 2018-02-02 08:48:02 +00:00
Thumb [LivePhysRegs] Fix handling of return instructions. 2018-02-06 23:00:17 +00:00
Thumb2 Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
WebAssembly [WebAssembly] Fix test expectations after r324274 2018-02-06 01:21:17 +00:00
WinCFGuard Reland "Emit Function IDs table for Control Flow Guard" 2018-01-09 23:49:30 +00:00
WinEH
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X86 [X86] Support folding in a k-register OR when creating KORTEST from scalar compare of a bitcast from vXi1. 2018-02-08 08:29:43 +00:00
XCore Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00