Tim Northover ba1d704229 ARM: don't size-reduce STMs using the LR register. ... The only Thumb-1 multi-store capable of using LR is the PUSH instruction, which translates to STMDB, so we shouldn't convert STMIAs. Patch by Sergey Dmitrouk. llvm-svn: 217498		2014-09-10 12:53:28 +00:00
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AArch64	[AArch64] Improve AA to remove unneeded edges in the AA MI scheduling graph.	2014-09-08 14:43:48 +00:00
ARM	ARM: don't size-reduce STMs using the LR register.	2014-09-10 12:53:28 +00:00
CPP	…
Generic	Add a regression test to sanity check the PBQP allocator.	2014-09-03 18:04:10 +00:00
Hexagon	DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.	2014-08-06 00:21:25 +00:00
Inputs	…
MSP430	Drop the W postfix on the 16-bit registers.	2014-09-10 06:58:14 +00:00
Mips	Replace -use-init-array with -use-ctors.	2014-09-02 13:54:53 +00:00
NVPTX	[MachineSink] Use the real post dominator tree	2014-09-01 03:47:25 +00:00
PowerPC	Enable splitting indexing from loads with TargetConstants	2014-09-02 16:05:23 +00:00
R600	R600/SI: Replace LDS atomics with no return versions	2014-09-08 15:07:31 +00:00
SPARC	…
SystemZ	…
Thumb	Check-label a bit more specific	2014-09-03 13:32:08 +00:00
Thumb2	ARM / x86_64 varargs: Don't save regparms in prologue without va_start	2014-08-22 21:59:26 +00:00
X86	[x32] Emit callq for CALLpcrel32	2014-09-09 11:54:12 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00