llvm-project/llvm/test/CodeGen
Sanjay Patel 38892e5ce1 [ARM] preserve test intent by removing undef
We need to clean up the DAG floating-point undef logic.
This process is similar to how we handled integer undef
logic in https://reviews.llvm.org/D43141.

And as we did there, I'm trying to reduce the patch by
changing tests that would probably become meaningless
once we correct FP undef folding.

Follow-up to:
https://reviews.llvm.org/rL332538
...because that change wasn't enough.

llvm-svn: 332637
2018-05-17 18:08:27 +00:00
..
AArch64 [AArch64] preserve test intent by removing undef 2018-05-17 18:07:02 +00:00
AMDGPU AMDGPU/SI: Handle infinite loop for the structurizer to work with CFG with infinite loops. 2018-05-17 16:45:01 +00:00
ARC
ARM [ARM] preserve test intent by removing undef 2018-05-17 18:08:27 +00:00
AVR [AVR] Add a regression test for struct return lowering 2018-03-20 11:23:03 +00:00
BPF [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Generic [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Hexagon [Hexagon] preserve test intent by removing undef 2018-05-16 22:49:08 +00:00
Inputs
Lanai
MIR [NFC] MIR-Canon: switching to a stable string sorting of instructions. 2018-05-13 06:07:20 +00:00
MSP430 Emit a left-shift instead of a power-of-two multiply for jump-tables 2018-05-16 08:58:26 +00:00
Mips [mips] Add support for isBranchOffsetInRange and use it for MipsLongBranch 2018-05-16 10:03:05 +00:00
NVPTX [NVPTX] Added a feature to use short pointers for const/local/shared AS. 2018-05-09 23:46:19 +00:00
Nios2
PowerPC [PowerPC] preserve test intent by removing undef 2018-05-16 22:48:48 +00:00
RISCV [RISCV] Set isReMaterializable on ADDI and LUI instructions 2018-05-17 15:51:37 +00:00
SPARC [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
SystemZ [SystemZ] Bugfix for MVCLoop CC clobbering. 2018-05-07 10:48:43 +00:00
Thumb Reapply ARM: Do not spill CSR to stack on entry to noreturn functions 2018-04-07 10:57:03 +00:00
Thumb2 [Thumb2] fix typo in test from r332548 2018-05-17 03:24:25 +00:00
WebAssembly [WebAsembly] Update default triple in test files to wasm32-unknown-unkown. 2018-05-10 17:49:11 +00:00
WinCFGuard
WinEH [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
X86 [X86][BtVer2] ADC/SBB take 2cy on an ALU pipe, not 1cy like ADD/SUB 2018-05-17 15:43:23 +00:00
XCore [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00