llvm-project/llvm/test/CodeGen/AVR
Patryk Wychowaniec 5650688e72 [AVR] Fix expanding MOVW for overlapping registers
When expanding a MOVW (16-bit copy) to two MOVs (8-bit copy), the
lower byte always comes first. This is incorrect for corner cases like
'$r24r23 -> $r25r24', in which the higher byte copy should come first.

Current patch fixes that bug as recorded at
https://github.com/rust-lang/rust/issues/98167

Reviewed By: benshi001

Differential Revision: https://reviews.llvm.org/D128588
2022-06-26 17:20:07 +08:00
..
atomics [FileCheck] Catch missspelled directives. 2022-05-26 11:37:19 +01:00
calling-conv/c [AVR] Reject/Reserve R0~R15 on AVRTiny. 2022-03-24 02:33:51 +00:00
features
inline-asm [Tests] Add elementtype attribute to indirect inline asm operands (NFC) 2022-01-06 14:23:51 +01:00
integration
intrinsics [AVR] Only support sp, r0 and r1 in llvm.read_register 2021-07-24 14:03:27 +02:00
pseudo [AVR] Fix expanding MOVW for overlapping registers 2022-06-26 17:20:07 +08:00
PR31344.ll
PR31345.ll
PR37143.ll
add.ll
alloca.ll
and.ll
avr-rust-issue-123.ll
block-address-is-in-progmem-space.ll Place the BlockAddress type in the address space of the containing function 2021-07-02 12:17:55 +01:00
branch-relaxation-long.ll
branch-relaxation.ll
brind.ll Place the BlockAddress type in the address space of the containing function 2021-07-02 12:17:55 +01:00
call.ll [AVR] Generate 'rcall' instead of 'call' on avr2 and avr25 2022-03-23 02:00:15 +00:00
clear-bss.ll
cmp.ll
com.ll
copy-data-to-ram.ll
ctlz.ll
ctors.ll [AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors' 2021-08-05 10:37:36 +08:00
ctpop.ll [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
cttz.ll
directmem.ll
div.ll
dynalloca.ll [AVR] Remove redundant dynalloca SP save/restore pass 2022-01-19 14:22:13 +01:00
elpm.ll [AVR] Generate ELPM for loading byte/word from extended program memory 2022-01-20 02:53:10 +00:00
eor.ll
expand-integer-failure.ll
frame.ll
frmidx-iterator-bug.ll
global-aliases.ll [AVR][MC] Emit some aliases for GPRs and IO registers 2022-03-24 02:08:22 +00:00
hardware-mul.ll [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
high-pressure-on-ptrregs.ll
icall-func-pointer-correct-addr-space.ll
impossible-reg-to-reg-copy.ll
interrupts.ll [AVR] Do not clear r0 at interrupt entry 2022-01-19 14:22:13 +01:00
io.ll
issue-cannot-select-bswap.ll
issue-regalloc-stackframe-folding-earlyclobber.ll
jmp-long.ll
large-return-size.ll
lit.local.cfg
load.ll
lower-formal-args-struct-return.ll
lower-formal-arguments-assertion.ll
lpmx.ll [AVR] Remove regalloc workaround for LDDWRdPtrQ 2022-01-23 17:08:00 +01:00
neg.ll
no-print-operand-twice.ll
or.ll
pr43443-ctor-alias.ll [AVR] Fix a potential assert failure 2022-02-11 02:25:58 +00:00
pre-schedule.ll
progmem-extended.ll
progmem.ll
rem.ll
return.ll
rot.ll [AVR] Fix rotate instructions 2021-07-24 14:03:26 +02:00
runtime-trig.ll
rust-avr-bug-37.ll
rust-avr-bug-95.ll
rust-avr-bug-99.ll
rust-avr-bug-112.ll
rust-bug-98167.ll [AVR] Fix expanding MOVW for overlapping registers 2022-06-26 17:20:07 +08:00
rust-trait-object.ll
sections.ll [AVR][MC] Generate section '.progmemX.data' for extended flash banks 2022-01-20 02:53:10 +00:00
select-must-add-unconditional-jump.ll
sext.ll
shift-expand.ll [AVR] Expand large shifts early in IR 2021-07-24 14:03:26 +02:00
shift.ll [AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15 2022-03-26 06:53:27 +00:00
sign-extension.ll [AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15 2022-03-26 06:53:27 +00:00
smul-with-overflow.ll [AVR] Make use of the constant value 0 in R1 2022-01-23 17:08:01 +01:00
software-mul.ll
std-ldd-immediate-overflow.ll
stdwstk.ll [AVR] Always expand STDSPQRr & STDWSPQRr 2022-05-05 03:10:59 +00:00
store-undef.ll [AVR] Make use of the constant value 0 in R1 2022-01-23 17:08:01 +01:00
store.ll
struct.ll
sub.ll
trunc.ll
umul-with-overflow.ll [AVR] Make use of the constant value 0 in R1 2022-01-23 17:08:01 +01:00
umul.with.overflow.i16-bug.ll
unaligned-atomic-loads.ll
varargs.ll [AVR] Do not chain stores in call frame setup 2021-07-24 14:03:26 +02:00
xor.ll
zext.ll